68HC705JB3 datasheet(51/134 Pages) FREESCALE

51 / 134 page

November 5, 1998

GENERAL RELEASE SPECIFICATION

MC68HC05JB3

INPUT/OUTPUT PORTS

MOTOROLA

REV 1

7-5

Figure 7-1. PB1 Slow Falling-edge Output

7.3

PORT-C

Port-C is a 4-bit bi-directional port. The Port-C data register is at $0002 and the

data direction register (DDRC) is at $0006. Reset does not affect the data regis-

ters, but clears the data direction registers, thereby returning the port pins to

inputs. Writing a ‘one’ to a DDR bit sets the corresponding port bit to output mode.

All Port-C pins have programmable pull-down resistors, and are only available on

the 28-pin version of the device.

PC0 is also used as the 16-timer OCMP output pin.

The table below summarizes the pin conﬁgurations for Port-A.

7.3.1 Port-C Data Register

7.3.2 Port-C Data Direction Register

PDRCx

DDRCx

Pin Configuration

Input with pull-down

Output Push-Pull

Input

Output Push-Pull

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

PORTC

PC3

PC2

PC1

PC0

$0002

reset:

00000000

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

DDRC

OCMPO

VROFF

DDRC3

DDRC2

DDRC1

DDRC0

$0006

reset:

00000000

50pF

5.0V

165ns

330ns

2.2V

Output Driver

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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