68HC705JB3 datasheet(68/134 Pages) FREESCALE

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GENERAL RELEASE SPECIFICATION

November 5, 1998

MOTOROLA

16-BIT TIMER

MC68HC05JB3

9-12

REV 1

9.7

TIMER OPERATION DURING WAIT MODE

During WAIT mode the 16-bit timer continues to operate normally and may gener-

ate an interrupt to trigger the MCU out of the WAIT mode.

9.8

TIMER OPERATION DURING STOP MODE

When the MCU enters the STOP mode the free-running counter stops counting

(the internal processor clock is stopped). It remains at that particular count value

until the STOP mode is exited by applying a low signal to the IRQ pin, at which

time the counter resumes from its stopped value as if nothing had happened. If

STOP mode is exited via an external reset (logic low applied to the RESET pin)

the counter is forced to $FFFC.

If a valid input capture edge occurs at the PB0/TCAP pin during the STOP mode

the input capture detect circuitry will be armed. This action does not set any ﬂags

or “wake up” the MCU, but when the MCU does “wake up” there will be an active

input capture ﬂag (and data) from the ﬁrst valid edge. If the STOP mode is exited

by an external reset, no input capture ﬂag or data will be present even if a valid

input capture edge was detected during the STOP mode.

Freescale Semiconductor, Inc.

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68HC705JB3 Datasheet(PDF) 68 Page - Freescale Semiconductor, Inc