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C8051F310/1/2/3/4/5/6/7
108
Rev. 1.6
Table 9.1. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
RST Output Low Voltage
IOL = 8.5 mA, VDD = 2.7 to 3.6 V
——
0.6
V
RST Input High Voltage
0.7 x
VDD
——
V
RST Input Low Voltage
—
—
0.3 x
VDD
RST Input Pullup Current
RST = 0.0 V
—
25
40
µA
VDD Monitor Threshold (VRST)
2.40
2.55
2.70
V
Missing Clock Detector Timeout
Time from last system clock rising
edge to reset initiation
100
220
600
µs
Reset Time Delay
Delay between release of any
reset source and code execution
at location 0x0000
5.0
—
—
µs
Minimum RST Low Time to
Generate a System Reset
15
—
—
µs
VDD Monitor Turn-on Time
100
—
—
µs
VDD Monitor Supply Current
—20
50
µA
VDD Ramp Time
VDD = 0 V to VDD = 2.7 V
——
1
ms
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