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C8051F310 Datasheet(PDF) 213 Page - List of Unclassifed Manufacturers

Part # C8051F310
Description  8/16 kB ISP Flash MCU Family
PDF  224 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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C8051F310 Datasheet(HTML) 213 Page - List of Unclassifed Manufacturers

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Rev. 1.6
213
C8051F310/1/2/3/4/5/6/7
SFR Definition 18.3. PCA0CPMn: PCA Capture/Compare Mode Registers
PCA0CPMn Address:
PCA0CPM0 = 0xDA (n = 0), PCA0CPM1 = 0xDB (n = 1),
PCA0CPM2 = 0xDC (n = 2), PCA0CPM3 = 0xDD (n = 3),
PCA0CPM4 = 0xDE (n = 4)
Bit7:
PWM16n: 16-bit Pulse Width Modulation Enable.
This bit selects 16-bit mode when Pulse Width Modulation mode is enabled (PWMn = 1).
0: 8-bit PWM selected.
1: 16-bit PWM selected.
Bit6:
ECOMn: Comparator Function Enable.
This bit enables/disables the comparator function for PCA module n.
0: Disabled.
1: Enabled.
Bit5:
CAPPn: Capture Positive Function Enable.
This bit enables/disables the positive edge capture for PCA module n.
0: Disabled.
1: Enabled.
Bit4:
CAPNn: Capture Negative Function Enable.
This bit enables/disables the negative edge capture for PCA module n.
0: Disabled.
1: Enabled.
Bit3:
MATn: Match Function Enable.
This bit enables/disables the match function for PCA module n. When enabled, matches of
the PCA counter with a module's capture/compare register cause the CCFn bit in PCA0MD
register to be set to logic 1.
0: Disabled.
1: Enabled.
Bit2:
TOGn: Toggle Function Enable.
This bit enables/disables the toggle function for PCA module n. When enabled, matches of
the PCA counter with a module's capture/compare register cause the logic level on the CEXn
pin to toggle. If the PWMn bit is also set to logic 1, the module operates in Frequency Output
Mode.
0: Disabled.
1: Enabled.
Bit1:
PWMn: Pulse Width Modulation Mode Enable.
This bit enables/disables the PWM function for PCA module n. When enabled, a pulse width
modulated signal is output on the CEXn pin. 8-bit PWM is used if PWM16n is cleared; 16-bit
mode is used if PWM16n is set to logic 1. If the TOGn bit is also set, the module operates in
Frequency Output Mode.
0: Disabled.
1: Enabled.
Bit0:
ECCFn: Capture/Compare Flag Interrupt Enable.
This bit sets the masking of the Capture/Compare Flag (CCFn) interrupt.
0: Disable CCFn interrupts.
1: Enable a Capture/Compare Flag interrupt request when CCFn is set.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
PWM16n
ECOMn
CAPPn
CAPNn
MATn
TOGn
PWMn
ECCFn
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xDA, 0xDB, 0xDC,
0xDD, 0xDE



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