INTELLON CONFIDENTIAL
23
ADVANCE INFORMATION
Rev 8.1
INT5130 Integrated Powerline MAC/PHY Transceiver Technical Data Sheet
GPSI DC Characteristics
Parameter
Symbol
Parameter Name
Test Condition
Min
Max
Unit
tGPSI_RPER
GPSI_RXCLK Period
@ 1.5 V
99.99
100.01
ns
tGPSI_RHIGH
GPSI_RXCLK High Time
@ 1.5 V
40
60
ns
tGPSI_RLOW
GPSI_RXCLK Low Time
@ 1.5 V
40
60
ns
tGPSI_RSU
GPSI_RXD and GPSI_RXEN Setup to
↑ GPSI_RXCLK
@ 1.5 V
15
ns
tGPSI_RDH
GPSI_RXD Hold after
↑ GPSI_RXCLK @ 1.5 V
15
ns
tGPSI_RRXENH
GPSI_RXEN Hold after
↓
GPSI_RXCLK
@ 1.5 V
0
ns
tGPSI_TPER
GPSI_TXCLK Period
@ 1.5 V
99.99
100.01
ns
tGPSI_THIGH
GPSI_TXCLK High Time
@ 1.5 V
40
60
ns
tGPSI_TDELAY
GPSI_TXD and GPSI_TXEN Delay
from
↑ GPSI_TXCLK
@ 1.5 V
0
70
ns
tGPSI_TRXENH
GPSI_RXEN Hold after
↓ GPSI_TXEN @ 1.5 V
0
ns
Receive Timing
Transmit Timing
Table 6: GPSI DC Characteristics
GPSI Signal Descriptions
GPSI_TXCLK and GPSI_RXCLK: The INT5130 generates a stable, continuous 10 MHz square
wave that is supplied on GPSI_TXCLK and GPSI_RXCLK. These clocks provide the timing
reference for the transfer of the GPSI_TXEN and GPSI_TXD signal, as well as GPSI_RXEN and
GPSI_RXD.
GPSI_RXD: GPSI_RXD contains the data recovered from the medium by the INT5130 and
transitions synchronously with respect to GPSI_RXCLK. The INT5130 properly formats the frame
such that the external host controller will be presented with the expected preamble plus SFD.
GPSI_RXEN: GPSI_RXEN is asserted by the INT5130 to indicate that the INT5130 has decoded
receive data to present to the external host controller.
GPSI_TXBSY: GPSI_TXBSY is an optionally used signal to tell the external host controller when the
INT5130 is available for sending packets. When a packet is being transmitted, GPSI_TXBSY is held
high. GPSI_TXBSY will go low whenever the INT5130 is ready to send another packet. If this signal
is not used, the transmitting logic must pace the packet transmissions to ensure that no packets are
lost due to buffer overflow.
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