M263 datasheet(14/398 Pages) NUVOTON

14 / 398 page

M261/M262/M263

Mar 25, 2020

Page 14 of 398

Rev 1.02

 Fast Flash programming verification with CRC

 On-chip Flash programming with In-Chip Programming (ICP), In-

System Programming (ISP) and In-Application Programming (IAP)

capabilities

 Configurable boot up sources including boot loader, user-defined

loader (LDROM) or Application ROM (APROM)

 2-wired ICP Flash updating through SWD interface

 32-bit/64-bit and multi-word Flash programming function

SRAM

 Up to 96 KB on-chip SRAM includes:

 32 KB SRAM located in bank 0 that supports hardware parity check;

Exception (NMI) generated upon a parity check error

 64 KB SRAM located in bank 1

 Byte-, half-word- and word-access

 PDMA operation

Cyclic Redundancy Calculation

(CRC)

 Supports CRC-CCITT, CRC-8, CRC-16 and CRC-32 polynomials

 Programmable initial value and seed value



Programmable order reverse setting and one’s complement setting

for input data and CRC checksum

 8-bit, 16-bit, and 32-bit data width

 8-bit write mode with 1-AHB clock cycle operation

 16-bit write mode with 2-AHB clock cycle operation

 32-bit write mode with 4-AHB clock cycle operation

 Uses DMA to write data with performing CRC operation

Peripheral DMA (PDMA)

 Sixteen independent and configurable channels for automatic data

transfer between memories and peripherals

 Support time-out function when transfer time-out

 Basic and Scatter-Gather transfer modes

 Each channel supports circular buffer management using Scatter-

Gather Transfer mode

 Stride function for rectangle image data movement

 Fixed-priority and Round-robin priorities modes

 Single and burst transfer types

 Byte-, half-word- and word tranfer unit with count up to 65536

 Incremental or fixed source and destination address

Clocks

External Clock Source

 4~24 MHz High-speed external crystal oscillator (HXT) for precise

timing operation

 32.768 kHz Low-speed external crystal oscillator (LXT) for RTC

function and low-power system operation

 Supports clock failure detection for external crystal oscillators and

exception generation (NMI)

Internal Clock Source

 12 MHz High-speed Internal RC oscillator (HIRC) trimmed to 0.25%

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