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AWR6843 Datasheet(PDF) 28 Page - Texas Instruments |
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AWR6843 Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 71 page ![]() 28 AWR6843 SWRS248 – APRIL 2020 www.ti.com Submit Documentation Feedback Product Folder Links: AWR6843 Specifications Copyright © 2020, Texas Instruments Incorporated 5.6 Power Consumption Summary Table 5-2 and Table 5-3 summarize the power consumption at the power terminals. Table 5-2. Maximum Current Ratings at Power Terminals PARAMETER SUPPLY NAME DESCRIPTION MIN TYP MAX UNIT Current consumption VDDIN, VIN_SRAM, VNWA Total current drawn by all nodes driven by 1.2V rail 1000 mA VIN_13RF1, VIN_13RF2 Total current drawn by all nodes driven by 1.3V rail 2000 VIOIN_18, VIN_18CLK, VIOIN_18DIFF, VIN_18BB, VIN_18VCO Total current drawn by all nodes driven by 1.8V rail 850 VIOIN Total current drawn by all nodes driven by 3.3V rail 50 (1) Two TX antennas are on simultaneously. Table 5-3. Average Power Consumption at Power Terminals PARAMETER CONDITION DESCRIPTION MIN TYP MAX UNIT Average power consumption 1.0-V internal LDO bypass mode 25% Duty Cycle 1TX, 4RX Use Case: Low power mode, 3.2 MSps complex transceiver, 25-ms frame time, 128 chirps, 128 samples/chirp, 8-µs interchirp time (25% duty cycle), DSP active TBD W 2TX, 4RX(1) TBD 50% Duty Cycle 1TX, 4RX Use Case: Low power mode, 3.2 MSps complex transceiver, 25-ms frame time, 256 chirps, 128 samples/chirp, 8-µs interchirp time (50% duty cycle), DSP active TBD 2TX, 4RX(1) TBD 1.3-V internal LDO enabled mode 25% Duty Cycle 1TX, 4RX Use Case: Low power mode, 3.2 MSps complex transceiver, 25-ms frame time, 128 chirps, 128 samples/chirp, 8-µs interchirp time (25% duty cycle), DSP active TBD 2TX, 4RX(1) TBD 50% Duty Cycle 1TX, 4RX Use Case: Low power mode, 3.2 MSps complex transceiver, 25-ms frame time, 256 chirps, 128 samples/chirp, 8-µs interchirp time (50% duty cycle), DSP active TBD 2TX, 4RX(1) TBD |
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