AWR6843 datasheet(32/71 Pages) TI1

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f 2

40 MHz

XTALP

XTALM

Cf1

Cf2

AWR6843

SWRS248 – APRIL 2020

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Specifications

(1)

The crystal manufacturer's specification must satisfy this requirement.

(2)

Includes initial tolerance of the crystal, drift over temperature, aging and frequency pulling due to incorrect load capacitance.

(3)

Crystal tolerance affects radar sensor accuracy.

5.10.2 Input Clocks and Oscillators

5.10.2.1 Clock Specifications

The AWR6843 requires external clock source (that is, a 40-MHz crystal or external oscillator to CLKP) for

initial boot and as a reference for an internal APLL hosted in the device. An external crystal is connected

to the device pins. Figure 5-2 shows the crystal implementation.

Figure 5-2. Crystal Implementation

NOTE

The load capacitors, Cf1 and Cf2 in Figure 5-2, should be chosen such that Equation 1 is

satisfied. CL in the equation is the load specified by the crystal manufacturer. All discrete

components used to implement the oscillator circuit should be placed as close as possible to

the associated oscillator CLKP and CLKM pins.

(1)

Table 5-4 lists the electrical characteristics of the clock crystal.

Table 5-4. Crystal Electrical Characteristics (Oscillator Mode)

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Parallel resonance crystal frequency

MHz

Crystal load capacitance

ESR

Crystal ESR

Temperature range Expected temperature range of operation

–40

105

ºC

Frequency

tolerance

Crystal frequency tolerance(1)(2)(3)

–50

ppm

Drive level

200

µW

AWR6843 Datasheet(PDF) 32 Page - Texas Instruments

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