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AWR6843 Datasheet(PDF) 34 Page - Texas Instruments |
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AWR6843 Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 71 page ![]() 34 AWR6843 SWRS248 – APRIL 2020 www.ti.com Submit Documentation Feedback Product Folder Links: AWR6843 Specifications Copyright © 2020, Texas Instruments Incorporated 5.10.3 Multibuffered / Standard Serial Peripheral Interface (MibSPI) 5.10.3.1 Peripheral Description The MibSPI/SPI is a high-speed synchronous serial input/output port that allows a serial bit stream of programmed length (2 to 16 bits) to be shifted into and out of the device at a programmed bit-transfer rate. The MibSPI/SPI is normally used for communication between the microcontroller and external peripherals or another microcontroller. Standard and MibSPI modules have the following features: • 16-bit shift register • Receive buffer register • 8-bit baud clock generator • SPICLK can be internally-generated (master mode) or received from an external clock source (slave mode) • Each word transferred can have a unique format. • SPI I/Os not used in the communication can be used as digital input/output signals 5.10.3.2 MibSPI Transmit and Receive RAM Organization The Multibuffer RAM is comprised of 256 buffers. Each entry in the Multibuffer RAM consists of 4 parts: a 16-bit transmit field, a 16-bit receive field, a 16-bit control field and a 16-bit status field. The Multibuffer RAM can be partitioned into multiple transfer group with variable number of buffers each. Table 5-7 and Table 5-8 assume the operating conditions stated in Table 5-6. Table 5-6. SPI Timing Conditions MIN TYP MAX UNIT Input Conditions tR Input rise time 1 3 ns tF Input fall time 1 3 ns Output Conditions CLOAD Output load capacitance 2 15 pF |
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