EM78P520N datasheet(20/124 Pages) EMC

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EM78P520N

8-Bit Microprocessor with OTP ROM



Product Specification (V1.4) 04.08.2016

(This specification is subject to change without prior notice)

6.2.4 R3 (LVD Control and Status)



Status Flag, Page Select Bits

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LVDEN

LVDS1

LVDS0

Bit 7 (LVDEN): Voltage Detect Enable Bit

0 : No action

1 : Voltage detect enabled

Bits 6~5 (LVDS1~LVDS0): Detect Voltage Select Bits

LVDS1

LVDS0

Detect Voltage

2.4V

2.7V

3.3V

3.9V

Bit 4 (T):

Time-out bit

Set to

“1” by the "SLEP" and "WDTC" commands, or during power up and

reset to

“0” by WDT timeout.

Bit 3 (P):

Power down bit

Set to “1” during power-on or by a "WDTC" command and reset to “0” by a

"SLEP" command.

Event

Remarks

WDT wakes up from sleep mode



WDT time out (not in sleep mode)



/RESET wakes up from sleep



Power up



Low pulse on /RESET



 = don't care

Bit 2 (Z):

Zero flag

Bit 1 (DC): Auxiliary carry flag

Bit 0 (C):

Carry flag

EM78P520N Datasheet(PDF) 20 Page - ELAN Microelectronics Corp

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