EM78P520N datasheet(32/124 Pages) EMC

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EM78P520N

8-Bit Microprocessor with OTP ROM

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Product Specification (V1.4) 04.08.2016

(This specification is subject to change without prior notice)

Bits 4~3 (T2MS1~T2MS0): Timer 2 Operation Mode Select Bits

T2MS1

T2MS0

Timer 2 Mode Select

Timer 2

SPI Baud Rate Generator

PWM 2

Bits 2~0 (T2P2~T2P0): Timer 2 Prescaler Bits

T2P2

T2P1

T2P0

Prescaler

1:2 (Default)

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

1 : 256

6.2.31 Bank 2 RA T2PD (Timer 2 Period Buffer)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PRD2[7]

PRD2[6]

PRD2[5]

PRD2[4]

PRD2[3]

PRD2[2]

PRD2[1]

PRD2[0]

Bits 7~0 (PRD2 [7]~PRD2 [0]): The content of this register is a period of Timer 2.

6.2.32 Bank 2 RB T2TD (Timer 2 Duty Buffer)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

TD2[7]

TD2[6]

TD2[5]

TD2[4]

TD2[3]

TD2[2]

TD2[1]

TD2[0]

Bits 7~0 (TD2 [7]~TD2 [0]): The content of this register is a duty of Timer 2.

6.2.33 Bank 2 RC SPIS (SPI Status Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DORD

TD1

TD0

OD3

OD4

RBF

Bit 7 (DORD): Data Shift Control Bit

0 : Shift left (MSB first)

1 : Shift right (LSB first)

EM78P520N Datasheet(PDF) 32 Page - ELAN Microelectronics Corp

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