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EM78P520N Datasheet(PDF) 39 Page - ELAN Microelectronics Corp |
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EM78P520N Datasheet(HTML) 39 Page - ELAN Microelectronics Corp |
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39 / 124 page ![]() EM78P520N 8-Bit Microprocessor with OTP ROM Product Specification (V1.4) 04.08.2016 31 (This specification is subject to change without prior notice) Bits 6~4 (VOF[2]~VOF[0]): Offset Voltage Bits VOF[2] VOF[1] VOF[0] EM78P520N 0 0 0 0LSB 0 0 1 2LSB 0 1 0 4LSB 0 1 1 6LSB 1 0 0 8LSB 1 0 1 10LSB 1 1 0 12LSB 1 1 1 14LSB Bits 3~0 (ADD3~ADD0): AD Low 4-Bit Data Buffer 6.2.46 Bank 3 RE EIESH (External Interrupt Edge Select High Byte Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 EIES7 EIES6 EIES5 EIES4 EIES3 EIES2 EIES1 EIES0 Bits 7~0 (EIES7~EIES0): External Interrupt 7~0 Edge Select Bit 0 : Falling edge interrupt 1 : Rising edge interrupt 6.2.47 Bank 3 RF EIESL (External Interrupt Edge Select Low Byte Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 0 ADWK INTWK9 INTWK8 EIES9 EIES8 Bits 7~5: Reserved Bit 4 (ADWK): A/D Converter Wake-up Function Enable Bit 0 : Disable 1 : Enable Bits 3~2 (INTWK9~INTWK8): External Interrupt 9~8 Wake-up Function Enable Bit 0 : Disable 1 : Enable Bits 1~0 (EIES9~EIES8): External Interrupt 9~8 Edge Select Bit 0 : Falling edge interrupt 1 : Rising edge interrupt |
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