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EM78P520N Datasheet(PDF) 28 Page - ELAN Microelectronics Corp

Part # EM78P520N
Description  8-Bit Microprocessor with OTP ROM
PDF  124 Pages
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Manufacturer  EMC [ELAN Microelectronics Corp]
Direct Link  http://www.emc.com.tw
Logo EMC - ELAN Microelectronics Corp

EM78P520N Datasheet(HTML) 28 Page - ELAN Microelectronics Corp

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EM78P520N
8-Bit Microprocessor with OTP ROM
20
Product Specification (V1.4) 04.08.2016
(This specification is subject to change without prior notice)
6.2.23
Bank 1 RC LCDSCR2 (LCD Segment Control Register 2)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
Bit 7: Reserved
Bits 6~0 (SEG22~SEG16): LCD Segment 22~16 Control Bits
0 : Disable, functions as normal I/O or other functions
1 : Enable, functions as LCD common driver pins
6.2.24
Bank 1 RE EIMR (External Interrupt Mask Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EXIE7
EXIE6
EXIE5
EXIE4
EXIE3
EXIE2
EXIE1
EXIE0
Bits 7~0 (EXIE7~EXIE0): Interrupt Enable Bit. Enable interrupt source respectively.
External interrupt
INT Pin Secondary Function Pin
Enable Condition
Edge
Digital Noise
Reject
INT7
PB3, SEG11
ENI+EXIE7 (EIMR7)
Rising or Falling
2/Fc
INT6
PB2, SEG10, AD11
ENI+EXIE6 (EIMR6)
Rising or Falling
2/Fc
INT5
PB1, SEG9, AD10
ENI+EXIE5 (EIMR5)
Rising or Falling
2/Fc
INT4
PB0, SEG8, AD9
ENI+EXIE4 (EIMR4)
Rising or Falling
2/Fc
INT3
P77, T1CAP
ENI+EXIE3 (EIMR3)
Rising or Falling
2/Fc
INT2
P76, T1CK
ENI+EXIE2 (EIMR2)
Rising or Falling
2/Fc
INT1
P75, T1OUT, PWM1
ENI+EXIE1 (EIMR1)
Rising or Falling
2/Fc
INT0
P74, SEG18
ENI+EXIE0 (EIMR0)
Rising or Falling
2/Fc
INT7~INT0: Pulse less than 2/Fc is eliminated as noise. Pulse more than 4/Fc is
treated as a trigger signal.
6.2.25
Bank 1 RF EISR (External Interrupt Status Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EXIF7
EXIF6
EXIF5
EXIF4
EXIF3
EXIF2
EXIF1
EXIF0
These bits are set to “1” when interrupt occurs.
Bits 7~0 (EXIF7~EXIF0): Interrupt Flag when External Interrupt 7~0 occur



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