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LT3474 Datasheet(PDF) 19 Page - Analog Devices |
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LT3474 Datasheet(HTML) 19 Page - Analog Devices |
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19 / 28 page ![]() LT3755/LT3755-1/LT3755-2 19 Rev. E For more information www.analog.com APPLICATIONS INFORMATION The inductor and output capacitor are chosen based on performance, size and cost. The compensation resistor and capacitor at VC are selected to optimize control loop response and stability. For typical LED applications, a 2.2nF compensation capacitor at VC is adequate, and a series resistor should always be used to increase the slew rate on the VC pin to maintain tighter regulation of LED current during fast transients on the input supply to the converter. Board Layout The high speed operation of the LT3755 demands careful attention to board layout and component placement. The exposed pad of the package is the only GND terminal of the IC and is also important for thermal management of the IC. It is crucial to achieve a good electrical and thermal contact between the exposed pad and the ground plane of theboard.Toreduceelectromagneticinterference(EMI),it isimportanttominimizetheareaofthehighdV/dtswitching node between the inductor, switch drain and anode of the Schottky rectifier. Use a ground plane under the switching node to eliminate interplane coupling to sensitive signals. The lengths of the high dI/dt traces: 1) from the switch node through the switch and sense resistor to GND, and 2) from the switch node through the Schottky rectifier and filter capacitor to GND should be minimized. The ground points of these two switching current traces should come to a common point then connect to the ground plane under the LT3755. Likewise, the ground terminal of the bypass capacitor for the INTVCC regulator should be placed near the GND of the switching path. Typically this requirement will result in the external switch being closest to the IC, along with the INTVCC bypass capacitor. The ground for the compensation network and other DC control signals should be star connected to the underside of the IC. Do not extensively route high impedance signals such as FB and VC, as they may pick up switching noise. In particular, avoid routing FB and PWMOUT in parallel for more than a few millimeters on the board. Minimize resistance in series with the SENSE input to avoid changes (most likely reduction) to the switch current limit threshold. 20W SEPIC LED Driver Efficiency vs VIN VIN LT3755-2 L1A 22µH GND VC INTVCC SHDN/UVLO FB VREF ISP 100k INTVCC 1M C1 4.7µF 50V 0.001µF 0.01µF L1: WÜRTH ELEKTRONIK 744870220 M1: VISHAY SILICONIX SI7454DP D1: DIODES INC. - PDS5100 M2: VISHAY SILICONIX SI2318DS VIN 8V TO 40V 187k 25k L1B 30k 28.7k 375kHz C2 4.7µF 10V CTRL 0.015 0.1 511k M2 M1 1A D1 5A 100V C4 2.2µF 50V C3 4.7µF 50V 20W LED STRING 37551 TA04a OPENLED PWM SS RT ISN GATE SENSE PWMOUT VIN (V) 0 80 85 90 95 100 10 20 30 37551 TA04b 40 VOUT = 18V ILED = 1A |
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