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9 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

9.1 Application Information

Most applications for the THP210 strive to deliver the best dynamic range in a design that delivers the desired

signal processing along with adequate phase margin for the amplifier. The following sections detail some of the

design issues with analysis, and guidelines for improved performance.

9.1.1 I/O Headroom Considerations

The starting point for most designs is to assign an output common-mode voltage for the THP210. For ac-coupled

signal paths, this voltage is often the default midsupply voltage to retain the most available output swing around

the voltage centered at the VOCM voltage. For dc-coupled signal paths, set this voltage to minimum of VVS± ±2 V

at VS = ± 18 V and VVS± ±1 V at VS = ± 2.5 V respectively. For precision ADC drivers, this output becomes the

input common mode voltage of the ADC.

From the target output VOCM, the next step is to verify that the desired output differential peak-to-peak voltage (V

OPP) stays within the supplies. For any desired differential VOPP, make sure that the absolute maximum voltage

at the output pins swings with Equation 1 and Equation 2 and confirm that these expressions are within the

supply rails minus the output headroom required for the RRO device.

Omax= VOCM+

OPP

(1)

Omin= VOCM -

OPP

(2)

Most designs do not run into an input range limit. However, using the approach shown in this section can allow a

quick assessment of the input V ICM range under the intended full-scale output condition. The TINA-TI™

simulation software can be used to plot the input voltages under the intended swings and application circuit to

verify that there is no limiting from this effect. Increasing the positive and negative supplies slightly in simulation

is an easy way to discover the simulated swings that might be going out of range.

9.1.2 DC Precision Analysis

9.1.2.1 DC Error Voltage at Room Temperature

Good dc linearity allows the designer to minimize the total dc output error of the system. In particular, this error

divides into two contributions: the initial error at the normal operating condition of 25°C, and the drift error over

temperature. The main sources of these errors typically arise from:

• Voltage error due to the input offset voltage (VIO)

• Voltage error due to noninverting and inverting bias current (IB–, IB+)

• The common-mode rejection ratio (CMRR) of the FDA

• Voltage error due to mismatch between input and output common-mode voltages (VVOCM – VICM)

One major source of error comes from the effect of mismatched resistor values and the ratios on the two sides of

the FDA. For this analysis, this error term is neglected. The effects are described separately in Section 9.1.4.

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THP210

SBOS932B – FEBRUARY 2020 – REVISED OCTOBER 2020

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