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THP210 Datasheet(PDF) 23 Page - Texas Instruments

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Part # THP210
Description  THP210 Ultra-Low Offset, High-Voltage, Low-Noise, Precision, Fully-Differential Amplifier
PDF  41 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

THP210 Datasheet(HTML) 23 Page - Texas Instruments

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Figure 9-5 and Figure 9-6 provide a graphical comparison of the described noise densities versus different gain
settings. Each of the contributors are separately showcased in the graphs. As expected, lower feedback
resistors (in this case, 2 kΩ) show that the dominant factor of the total output noise is the intrinsic voltage noise
of the FDA (at gains > 2). For smaller gain settings, the thermal noise of the feedback resistors is dominating.
Gain (V/V)
1
10
10
í9
10
í8
10
í7
eo
enRf
eni
in × Rf
0.1
100
10
í6
RF = 2 kΩ
Figure 9-5. Calculated Noise Densities vs Gain
Settings
Gain (V/V)
1
10
10
í9
10
í8
10
í7
10
í6
eo
enRf
eni
in × Rf
0.1
100
RF = 10 kΩ
Figure 9-6. Calculated Noise Densities vs Gain
Settings
The advancement of the THP210 can be seen at higher feedback resistors (in this case 10 kΩ). Many FDAs
exhibit an input current noise density in the range of some pA/√Hz that, in cases for higher feedback resistors,
dictate the noise behavior. As a result of the superior current noise density of 300 fA/√Hz of the THP210, the
overall output noise is mainly dominated by the thermal noise of the resistors (here, up to gains of approximately
15).
The total output voltage noise density is important when using FDAs as ADC input driver stages. To evaluate the
compatibility between the input driver and the ADC from a noise perspective, compare the calculated RMS
output noise of the FDA with the least-significant bit (LSB) of the desired ADC application, in respect to the
effective number of bits (ENOB). Section 9.2.2 shows measurements of the THP210 in combination with state-
of-the-art SAR ADCs, and indicates the performance that is achieved.
9.1.4 Mismatch of External Feedback Network
The common-mode rejection ratio (CMRR) is one of the key elements when designing with fully differential
amplifiers. Although FDAs are designed to provide the best CMRR performance, poor selection of external gain
setting resistors, as well as careless board layout techniques, significantly degrade CMRR performance.
In an ideal world, the resistors in a typical circuit, as shown in the test circuit Figure 7-1, are chosen to be RF1 / R
F2 = RI1/RI2. Mismatch between these ratios causes the differential output to depend on the input common-mode
voltage (VVOCM), and that in turn produces an offset and excess noise on the differential output. As mentioned in
the previous section, the mismatch of the external resistor network primarily contributes to the dc error.
Generally, a resistor mismatch of 0.1% and a ratio of 1 V/V results in a CMRR of 60 dB. The natural degradation
of the external resistor network is minimized by the following guidelines:
• Consider input impedance matching, as shown in the Input impedance matching with fully differential
amplifiers technical brief.
• Follow layout guidelines, as provided in Section 11.1.
• Use compensation techniques, as described in the Improving PSRR and CMRR in Fully Differential
Amplifiers application report
Despite the mismatch of the external feedback network, the internal common-mode feedback amplifier regulates
the outputs to remain balanced in amplitude and remain 180° out of phase. The output balance performance
stays unaffected by the CMRR degradation.
www.ti.com
THP210
SBOS932B – FEBRUARY 2020 – REVISED OCTOBER 2020
Copyright © 2020 Texas Instruments Incorporated
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