LTC3370 datasheet(23/28 Pages) AD

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LTC3376

Rev 0

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APPLICATIONS INFORMATION

bias and temperature. A physically larger capacitor or one

with a higher voltage rating may be required.

PCB Considerations

When laying out the printed circuit board, the following

list should be followed to ensure proper operation of the

LTC3376:

1. The input supply pins (VINA-H) should each have local

decoupling capacitors with their ground pins connect-

ing back to the PGND pin (PGNDA-H) of the IC with as

short and wide a trace as possible before connecting

to the GND plane. The VIN and PGND pins are placed

next to each other on the outer edge of the IC for

this purpose. Note that large switched currents flow

in the LTC3376’s VIN and PGND pins, and in the VIN

input capacitor. The loop formed by the input capaci-

tor should be made as tight as possible by placing

the capacitor adjacent to the VIN and PGND pins and

choosing a small case size such as 0402 for the 1µF

capacitor and 0603 for the 10µF capacitor. Place a

local, unbroken ground plane under the application

circuit on the layer closest to the surface layer.

2. When connecting BST pins together for ganging, the

BST trace should be as short as possible.

3. The switching power traces connecting SWA-H to

their respective inductors should be short and wide

to reduce radiated EMI and parasitic coupling. Due to

the large voltage swing of the switching nodes, high

input impedance sensitive nodes, such as the feed-

back nodes, should be kept far away or shielded from

the switching nodes or poor performance could result.

4. Keep the FB+, FB–, RT, TEMP, and RUN nodes small

so that ground traces will shield them from the SW

and BST nodes.

5. The GND pin should connect directly to the ground

side of the INTVCC bypass cap and then connect to the

ground connection of other analog components (RT

resistor, IMON resistor, VCC and EXTVCC bypass caps)

before connecting down to the GND plane.

6. The bypass capacitor from INTVCC to GND should be

as close to the INTVCC pin as possible and connected

with a wide trace.

7. The bypass capacitor from INTVCC_P to GND should

be as close to the INTVCC_P pin as possible and con-

nected with a wide trace. The ground side of this

capacitor should connect directly to the GND plane.

8. The GND side of the switching regulator output capac-

itors should connect to the GND plane.

9. The FB– pin should connect directly to the GND side

of the feedback resistor.

10. The power stages should have a symmetric layout

with respect to VIN, PGND, BST, and SW traces.

11. See Evaluation Kit Design Files for recommended

layouts.

LTC3370 Datasheet(PDF) 23 Page - Analog Devices

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