LTC4449 datasheet(32/48 Pages) AD

32 / 48 page

LTC7871

Rev. 0

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to the part. The second byte, is data from/to the specified

code) byte. See Figure 11 for an example of a detailed

write sequence, and Figure 12 for a read sequence. All

bytes shift with MSB first.

Figure 13 shows an example of two write communica-

tion bursts. The first byte of the first burst sent from the

Single Byte Transfers

The serial port is arranged as a simple memory map, with

status and control available in 5 read/write and 6 read only

byte-wide registers. All data bursts are comprised of at

least three bytes. The 7 most significant bits (MSB) of the

first byte are the register address, with an LSB of 1 indi-

cating a read from the part, and LSB of 0 indicating a write

APPLICATIONS INFORMATION

Figure 11.

MASTER-SCLK

MASTER-CSB

MASTER-SDI

A6 A5 A4 A3 A2 A1 A0 0

7-BIT REGISTER ADDRESS

0 = WRITE

D7 D6 D5 D4 D3 D2 D1 D0

8 BITS OF DATA

P7 P6 P5 P4 P3 P2 P1 P0

8 BITS OF PEC

PARALLEL LOAD

24 CLOCKS

LTC7871-SDO

7871 F11

Serial Port Write Sequence

Figure 12.

MASTER-SCLK

MASTER-CSB

MASTER-SDI

7-BIT REGISTER ADDRESS

1 = READ

8 BITS OF DATA

8 BITS OF PEC

24 CLOCKS

LTC7871-SDO

7871 F12

A6 A5 A4 A3 A2 A1 A0 1

D7 D6 D5 D4 D3 D2 D1 D0 P7 P6 P5 P4 P3 P2 P1 P0

Serial Port Read Sequence

Figure 13.

MASTER–CSB

MASTER–SDI

LTC7871–SDO

7871 F13

PEC0

PEC1

DATA0

DATA1

ADDR0+WR

ADDR1+WR

Two Write Communication Bursts

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