LTC4449 datasheet(23/48 Pages) AD

23 / 48 page

LTC7871

Rev. 0

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The peak-to-peak MOSFET gate drive levels are set by

the internal DRVCC regulator voltage. Pay close atten-

tion to the BVDSS specification for the MOSFETs as well.

Selection criteria for the power MOSFETs include the on-

resistance RDS(ON), input capacitance, input voltage and

maximum output current. MOSFET input capacitance is

a combination of several components but can be taken

from the typical gate charge curve included on most data

sheets (Figure 5). The curve is generated by forcing a

constant input current into the gate of a common source,

current source loaded stage and then plotting the gate

voltage versus time.

Figure 5.

–

VDS

VIN

7871 F05

VGS

MILLER EFFECT

QIN

CMILLER = (QB – QA)/VDS

VGS

–

Gate Charge Characteristic

The initial slope is the effect of the gate-to-source and the

gate-to-drain capacitance. The flat portion of the curve is

the result of the Miller multiplication effect of the drain-

to-gate capacitance as the drain drops the voltage across

the current source load. The upper sloping line is due to

the drain-to-gate accumulation capacitance and the gate-

to-source capacitance. The Miller charge (the increase

in coulombs on the horizontal axis from a to b while the

curve is flat) is specified for a given VDS drain voltage,

but can be adjusted for different VDS voltages by multi-

plying the ratio of the application VDS to the curve speci-

fied VDS values. A way to estimate the CMILLER term is to

take the change in gate charge from points a and b on a

manufacturer’s data sheet and divide by the stated VDS

voltage specified. CMILLER is the most important selec-

tion criteria for determining the transition loss term in

the top MOSFET but is not directly specified on MOSFET

data sheets. CRSS and COS are specified sometimes but

definitions of these parameters are not included. When

a specified maximum, the inductor should be chosen

according to:

L ≥

VHIGH – VLOW

fOSC •IRIPPLE

•

VLOW

VHIGH

Inductor Core Selection

Once the inductance value is determined, the type of

inductor must be selected. Core loss is independent of

core size for a fixed inductor value, but it is very depen-

dent on inductance selected. As inductance increases,

core losses go down. Unfortunately, increased inductance

requires more turns of wire and therefore copper losses

will increase.

Ferrite designs have very low core loss and are preferred

at high switching frequencies, so design goals can con-

centrate on copper loss and preventing saturation. Ferrite

core material saturates “hard,” which means that induc-

tance collapses abruptly when the peak design current is

exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

Power MOSFET and Schottky Diode (Optional)

Selection

At least two external power MOSFETs need to be selected:

One N-channel MOSFET for the top switch and one or

more N-channel MOSFET(s) for the bottom switch. The

number, type and on-resistance of all MOSFETs selected

take into account the voltage step-down ratio as well

as the actual position (top or bottom) in which the

MOSFET will be used. A much smaller and much lower

input capacitance MOSFET should be used for the top

MOSFET in applications that have an VLOW that is less

than one-third of VHIGH. In applications where VHIGH >>

VLOW, the top MOSFETs’ on-resistance is normally less

important for overall efficiency than its input capacitance

at operating frequencies above 300kHz. MOSFET man-

ufacturers have designed special purpose devices that

provide reasonably low on-resistance with significantly

reduced input capacitance for the top switch application

in switching regulators.

APPLICATIONS INFORMATION

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