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ADL5206ACPZ-R7 Datasheet(PDF) 17 Page - Analog Devices |
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ADL5206ACPZ-R7 Datasheet(HTML) 17 Page - Analog Devices |
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17 / 25 page ![]() Data Sheet ADL5206 Rev. 0 | Page 17 of 25 –10 0 10 20 30 40 50 60 70 10M 100M 1G 10G FREQUENCY (Hz) VPOS = 3.3V, LOW POWER MODE VPOS = 5V, HIGH PERFORMANCE MODE VOLTAGE GAIN = 2dB VOLTAGE GAIN = 32dB Figure 48. CMRR vs. Frequency at Voltage Gain = 2 dB and Voltage Gain = 32 dB, 5 V High Performance Mode and 3.3 V Low Power Mode 1.0 1.5 2.0 2.5 3.0 3.5 4.0 –10 –5 0 5 10 15 20 25 30 SETTLING TIME (ns) 21ns TO 28ns Figure 49. Output Common-Mode Voltage vs. Settling Time, 5 V High Performance Mode, Maximum Gain Transition 400 350 300 250 200 150 100 10M 100M 1G FREQUENCY (Hz) 2G Figure 50. Group Delay vs. Frequency at Maximum Gain, 3.3 V Low Power Mode 10M 100M 1G 2G 400 350 300 250 200 150 100 FREQUENCY (Hz) Figure 51. Group Delay vs. Frequency at Maximum Gain, 5 V High Performance Mode 10M 100M 1G 2G 40 30 10 20 0 –10 –20 –30 –40 FREQUENCY (Hz) Figure 52. Group Delay vs. Frequency at Maximum Gain, 5 V Low Power Mode 0 0.5 1.0 1.5 2.0 2.5 3.0 –5 –3 –1 1 3579 11 13 15 SETTLING TIME (ns) 3ns TO 4ns Figure 53. Output Common-Mode Voltage vs. Settling Time, 3.3 V Low Power Mode, Maximum Gain Transition |
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