ATMEGA640 datasheet(262/436 Pages) MICROCHIP

262 / 436 page

262

ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

• Bit 4 – TWSTO: TWI STOP Condition Bit

Writing the TWSTO bit to one in Master mode will generate a STOP condition on the 2-wire Serial Bus. When the

STOP condition is executed on the bus, the TWSTO bit is cleared automatically. In Slave mode, setting the

TWSTO bit can be used to recover from an error condition. This will not generate a STOP condition, but the TWI

returns to a well-defined unaddressed Slave mode and releases the SCL and SDA lines to a high impedance state.

• Bit 3 – TWWC: TWI Write Collision Flag

The TWWC bit is set when attempting to write to the TWI Data Register – TWDR when TWINT is low. This flag is

cleared by writing the TWDR Register when TWINT is high.

• Bit 2 – TWEN: TWI Enable Bit

The TWEN bit enables TWI operation and activates the TWI interface. When TWEN is written to one, the TWI

takes control over the I/O pins connected to the SCL and SDA pins, enabling the slew-rate limiters and spike filters.

If this bit is written to zero, the TWI is switched off and all TWI transmissions are terminated, regardless of any

ongoing operation.

• Bit 1 – Res: Reserved Bit

This bit is a reserved bit and will always read as zero.

• Bit 0 – TWIE: TWI Interrupt Enable

When this bit is written to one, and the I-bit in SREG is set, the TWI interrupt request will be activated for as long as

the TWINT Flag is high.

24.9.3

TWSR – TWI Status Register

• Bits 7:3 – TWS: TWI Status

These five bits reflect the status of the TWI logic and the 2-wire Serial Bus. The different status codes are

described later in this section. Note that the value read from TWSR contains both the 5-bit status value and the 2-

bit prescaler value. The application designer should mask the prescaler bits to zero when checking the Status bits.

This makes status checking independent of prescaler setting. This approach is used in this datasheet, unless oth-

erwise noted.

• Bit 2 – Res: Reserved Bit

This bit is reserved and will always read as zero.

• Bits 1:0 – TWPS: TWI Prescaler Bits

These bits can be read and written, and control the bit rate prescaler.

Bit

76543210

(0xB9)

TWS7

TWS6

TWS5

TWS4

TWS3

–

TWPS1

TWPS0

TWSR

Read/Write

RRRRRR

R/W

Initial Value

11111000

Table 24-7.

TWI Bit Rate Prescaler

TWPS1

TWPS0

Prescaler Value

ATMEGA640 Datasheet(PDF) 262 Page - Microchip Technology

ATMEGA640 Datasheet(HTML) 262 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL