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ATMEGA640 Datasheet(PDF) 264 Page - Microchip Technology |
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ATMEGA640 Datasheet(HTML) 264 Page - Microchip Technology |
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264 / 436 page  264 ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET] DS40002211A 24.9.6 TWAMR – TWI (Slave) Address Mask Register • Bits 7:1 – TWAM: TWI Address Mask The TWAMR can be loaded with a 7-bit Slave Address mask. Each of the bits in TWAMR can mask (disable) the corresponding address bit in the TWI Address Register (TWAR). If the mask bit is set to one then the address match logic ignores the compare between the incoming address bit and the corresponding bit in TWAR. Figure 24- 22 shows the address match logic in detail. Figure 24-22. TWI Address Match Logic, Block Diagram • Bit 0 – Res: Reserved Bit This bit is reserved and will always read as zero. Bit 76543210 (0xBD) TWAM[6:0] – TWAMR Read/Write R/W R/W R/W R/W R/W R/W R/W R Initial Value 00000000 Address Match Address Bit Comparator 0 Address Bit Comparator 6..1 TWAR0 TWAMR0 Address Bit 0 |
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