DP8428 datasheet(23/26 Pages) NSC

23 / 26 page

Switching Characteristics DP8428 and DP8429 (Continued)

VCC e 50V g 10% 0 C s TA s 70 C unless otherwise noted (Notes 2 4 5) The output load capacitance is typical for 4

banks of 22 DRAMs each or 88 DRAMs including trace capacitance

These values are Q0-Q9 CL e 500 pF RAS0–RAS3 CL e 150 pF WE CL e 500 pF CAS CL e 600 pF RL e 500X

unless otherwise noted See

Figure 11 for test load Maximum propagation delays are specified with all outputs

switching

Preliminary

Symbol

Refresh Parameter

Condition

All CL e 50 pF

Units

Min

Max

Min

Max

tRGRL

RGCK Low to RAS Low

Figure 3

tRGRH

RGCK Low to RAS High

Figure 3

tRQHRF

RFSH Hold Time from RGCK

Figure 3

tRFRH

RFSH High to RAS High

(See Mode 1

(Ending Forced Refresh

Description)

early)

tRFSRG

RFSH Low Set-up to

(See Mode 1

RGCK Low (Mode 1)

Description)

Figure 3

tCSHR

CS High to RASIN Low for

Figure 7

Hidden Refresh

tCSRL1

CS Low to Access RASIN

Figure 3

for DP8429

Low (Using Mode 5 with

Auto Refresh Mode)

tCSRL1

CS Low to Access RASIN

Figure 3

5ns

for DP8428

Low (Using Mode 5 with

Auto Refresh Mode)

tCSRL0

CS Low to Access RASIN

(See Mode 5

Low (Using Modes 4 or 5

Description)

with externally controlled

Refresh)

tRKRL

RFCK High to RASIN

low for hidden Refresh

Input Capacitance TA e 25 C (Note 2)

Symbol

Parameter

Condition

Min

Typ

Max

Units

CIN

Input Capacitance ADS RC CS M2 RASIN

8pF

CIN

Input Capacitance All Other Inputs

Note 1

‘‘Absolute Maximum Ratings’’ are the values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the device

should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation

Note 2

All typical values are for TAe25 C and VCCe50V

Note 3

This test is provided as a monitor of Driver output source and sink current capability Caution should be exercised in testing this parameter In testing these

parameters a 15X resistor should be placed in series with each output under test One output should be tested at a time and test time should not exceed 1 second

Note 4

Input pulse 0V to 30V tRetFe25 ns fe25 MHz tPWe200 ns Input reference point on AC measurements is 15V Output reference points are 24V for

High and 08V for Low

Note 5

The load capacitance on RF IO should not exceed 50 pF

DP8428 Datasheet(PDF) 23 Page - National Semiconductor (TI)

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