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PCM16C02 Datasheet(PDF) 21 Page - National Semiconductor (TI) |
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PCM16C02 Datasheet(HTML) 21 Page - National Semiconductor (TI) |
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21 / 42 page ![]() 60 Operational Modes 61 INITIAL SETUP (RESET) AND CONFIGURATION In order to set up the IO windows the Function Base Reg- isters 0 1 and the Function Limit Registers 0 1 must be loaded These registers are loaded with base address infor- mation gained from reading the TPCE IO field within the Card Configuration Table Entry Tuple (CISTPL CFTA- BLE ENTRY 1Bh) in the CIS (Card Information Structure) This will allow the system software to configure the windows and set the IO addresses for each function The software locates the Configuration Option Registers based on ad- dress offset values stored in the TPCC RADR field within the Configuration Tuple (CISTPL CONFIG 1Ah) in the CIS Upon a subsequent readwrite operation from the PC Card host to the current IO window address the PCM16C02 decodes for a match and then passes the ap- propriate data address and control signals to the appropri- ate function port Note the Attribute memory CIS is initially loaded from the EEPROM upon reset 62 RESET CONDITIONS When the device is reset using the reset pin the following actions take place First the attribute memory CIS is re- loaded from the EEPROM The Function Configuration Op- tion Registers 0 1 are reset to a value of 00 Hex All other registers are set to their default values 63 INTERRUPT CONTROL For multi-function operation the PCM16C02 implements a shared interrupt scheme The PCM16C02 will assert PC Card IREQ when either CINT(0) or CINT(1) is asserted If the Function Configuration Option Register is configured for pulsed mode interrupts the IREQ pin will send out a pulse width of period 16fMCLK(0) During multi-function operation however level mode interrupts are strongly recommended The Function Configuration Status Registers indicate which function initiated the interrupt and interrupts will continue until the interrupt requests are processed This mode would be used if both functions are running at the same time (con- currently) See the description of the IntrReset bit in the Function Con- figuration Status Registers 0 1 for a multi-function interrupt protocol that insures multiple interrupts sharing one IREQ line are not missed 64 FUNCTIONAL CONCURRENCY A Dual Function Card may be designed using the PCM16C02 IC that allows both functions to run concurrent- ly 65 16-BIT8-BIT OPERATION During normal operation the PCM16C02 will function as a 16-bit device If 8-bit operation is desired (PC Card Host accesses are 8-bit) the PCM16C02 will pass the 8-bit trans- action to the Function With the common memory device the PCM16C02 will check the Memls8 bit in the Pin Polarity Register If Memls8 is clear (16-bit memory) the PCM16C02 will strobe MEMWEL for 8-bit accesses on even address boundaries and MEMWEH for 8-bit accesses on odd ad- dress boundaries A 16-bit access causes both MEMWEL and MEMWEH to be strobed If Memls8 is set (8-bit mem- ory) the PCM16C02 will strobe MEMWEL for 8-bit PC Card accesses on odd or even address boundaries For 16- bit access the PCM16C02 will only obtain one byte of data by strobing MEMWEL 66 SPECIAL TESTABILITY MODES National Proprietary TEST(0) pin should be left disconnect- ed Software System or device software can interact with the PCM16C02 IC directly using either the PCM16C02’s PC Card registers PC Card Extended registers or PCM16C02 specific regis- ters CIS (CARD INFORMATION STRUCTURE) When the PCM16C02 powers on the contents of the EEPROM are loaded into the device’s shadow RAM This not only allows attribute memory accesses to the CIS but it also provides defaults for 9 PCM16C02 specific registers to be loaded This allows default loading of parameters that are transparent to system or device software The best use is for the card manufacturer to determine what values these should be and program them into the EEPROM when the CIS is programmed Either system software such as Card ServicesSocket Services or device software may read and parse the CIS by accessing attribute memory on the PC Card If desired this software agent may write to the CIS or default EEPROM registers and if desired have these new values saved to the EEPROM The actual contents of the CIS and the static registers is PC Card design dependent 21 |
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