
VT8601 Apollo ProMedia
Revision 1.3 September 8, 1999
-126
3D Graphics Engine Registers
7HFKQRORJLHV ,QF
:H&
:H&RRQQHFW
QQHFW
Pixel Engine Registers
The major responsibilities of the Pixel Engine are to perform
per-pixel operations and to control data flow and its sequence.
The Pixel engine interfaces to the Rasterization Engine and
the host to accept data.
It also interfaces to the Memory
Interface to access video memory. Inside the Pixel Engine,
there are several blocks: the Span Engine, the Data Path, and
the Texture Engine.
Operation of the Data Path and the
Texture Engine are under control of the Span Engine. The
Memory Interface accepts memory access requests from the
Pixel Engine, translates the address into a linear address, and
executes the requests.
The 0 - FFh “Engine” register address space is partitioned
into six sections:
0 - 0Fh
Span Engine
10 - 2Fh
VGA core
30 - 3Fh
Unified Rasterization and Setup Engines
44 - 9Fh
Pixel Engine
A0 – AFh
Texture Engine
B0 – BFh
Command List Control Unit
C0 – FFh
Memory Interface
Addresses 40h - FFh are also used for sequential loading
overlapping with other registers in this space.
Addresses
10000
-
1FFFFh
are
used
as
a
data
port
area.
Data from the Host
The Pixel Engine can accept data from the host through either
the 32-bit data port register at 9Ch or data in the 1xxxh
address space. Software passes only enough DWORDs to
hardware.
Software
doesn’t
pack
data
to
64-bit
boundaries. It only packs to 32-bit boundaries. For bitblts,
packing is done per-scanline. I.e., for every scanline, the host
will send just enough DWORDs to the engine.
For text,
packing is done per-command.
I.e., the scanline may be
broken inside a DWORD. For a string of texts, the number of
DWORDs of data passed to the Graphic Engine can be odd
numbers except for the last character. For the last character,
software should pass either an even number of DWORDs (by
padding a garbage DWORD as necessary) or by setting a
drawing environment register after all data is sent.
A
D
A
D
AGP
Memory Interface
Rasterization
Span
Data Path
Texture Engine