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VT8601 Datasheet(PDF) 138 Page - List of Unclassifed Manufacturers

Part # VT8601
Description  Single-Chip Slot-1 / Socket-370 PCI North Bridge With Integrated AGP 2D / 3D Graphics Accelerator and Advanced Memory Controller
PDF  144 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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VT8601 Datasheet(HTML) 138 Page - List of Unclassifed Manufacturers

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VT8601 Apollo ProMedia
Revision 1.3 September 8, 1999
-132
3D Graphics Engine Registers
7HFKQRORJLHV ,QF
:H&
:H&RRQQHFW
QQHFW
Texture Engine Registers
The texture Engine handles texture access and filtering. It is
controlled by the Span Engine. It accepts texture coordinates
from the Rasterization Engine, generates and passes addresses
to the Memory Interface, accepts raw texel data from the
Memory Interface, does filtering, and passes the results to the
Data Path.
GEbase + A0 – Texture Control.......................................RW
Textures are aligned to 64-bit boundaries on a scanline basis.
31
Texture Access Control
0
Disable (use cache)
1
Enable (bypass cache)
30
Filtering Control
0
Filter with color key.
Treat alpha value for
keyed texels as 0
1
Downgrade
filtering
function
based
on
fractional bits of UV and key test result. Set
alpha to 0 for keyed texels.
29-28 Texture U Boundary Checking Function
00 Texture U wraparound
01 Texture U mirroring
10 Texture U clamping
11 -reserved-
27-26 Texture V Boundary
00 Texture V wraparound
01 Texture V mirroring
10 Texture V clamping
11 -reserved-
25
Texture in System Memory
0
Texture is stored in graphics memory
1
Texture is stored in system memory
24
Reserved (must be 0)
23
MipMap
0
Disable
1Enable
22
Intra-map Filter
0
Disable
1
Enable (do filtering inside a LOD level)
21
Inter-map Filter
0
Disable
1
Enable (do filtering inside a LOD level)
M must be 1.
20
Magnify Filter (when LOD < 0)
0Point Sample
1
Bi-linear
19
Tiling
0
Texture is not tiled
1
Texture is tiled.
Tile size is determined by texel depth:
Texel Depth (bpp)
Tile Size
1
16 x 16
28 x 16
48 x 8
84 x 8
16
4 x 4
32
2 x 4
Inside each tile, texels are organized into 2x2
subtiles in row major
18
Texture Color Key
0
Disable
1Enable
17
Texture Anisotropy
0
Disable
1Enable
16-15 Palette Data Format
00 565 RGB
01 1555 ARGB
10 4444 ARGB
11 -reserved-
14-12 Texel Depth
000 1-bpp palettized
001 2-bpp palettized
010 4-bpp palettized
011 8-bpp palettized
100 16-bpp 565 RGB
101 16-bpp 1555 ARGB
110 16-bpp 4444 ARGB
111 32-bpp ARGB
11-8 Texture Map Levels (TML) (Range 0-8)
The number of maps in the MipMap (0 = 1 map)
7-4
Y-Axis Texture Memory Size (TRY) (Range 0-8)
This field determines the number of lsb’s (2**TRY)
of parameter V to be used in the Y axis. Any bit
higher than this will be ignored (wraparound).
3-0
X-Axis Texture Memory Size (TRX) (Range 0-8)
This field determines the number of lsb’s (2**TRX)
of parameter U to be used in the X axis. Any bit
higher than this will be ignored (wraparound).
Note:
For MipMap textures, TRX/TRY is the size of the
original texture (1:1 map)



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