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MAX17843 Datasheet(PDF) 109 Page - Maxim Integrated Products |
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MAX17843 Datasheet(HTML) 109 Page - Maxim Integrated Products |
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109 / 131 page  BIT POR NAME DESCRIPTION D15 0 DIR[3:0] Setting DIRn enables GPIOn as an output. Default state is high-impedance input. D14 D13 D12 D11 0 RD[3:0] Indicates the current logic state of each GPIOn pin input buffer. The logic state is sampled at the end of the parity bit of the register address byte during a read of this register. Read- only. D10 D9 D8 D7 0 GPIO3TMR Enables the GPIO3 timer mode. This mode overrides DIR3 and DRV3 and drives GPIO3 to logic-one when the timer is counting, and drives to logic-zero when the timer times out. Emergency cell-discharge mode (EMGCYDCHG = 1) automatically enables the GPIO3 timer mode. D6 0 Reserved Always reads logic-zero. D5 D4 D3 0 DRV[3:0] Setting DRVn sets GPIOn to logic-one if DIRn is set. D2 D1 D0 MAX17843 12-Channel, High-Voltage Smart Sensor Data-Acquisition Interface www.maximintegrated.com Maxim Integrated │ 109 GPIO Register (address 0x11) |
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