ADN2855ACPZ-R7 datasheet(3/20 Pages) AD

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Data Sheet

ADN2855

Rev. B | Page 3 of 20

SPECIFICATIONS

TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 µF, input data pattern: PRBS 223 − 1, unless otherwise noted.

Table 1.

Parameter

Conditions

Min

Typ

Max

Unit

INPUT BUFFER—DC CHARACTERISTICS

Input Voltage Range

@ PIN or NIN, dc-coupled

VCC − 0.6

VCC − 0.1

Peak-to-Peak Differential Input

PIN − NIN

0.2

1.2

ACQUISITION TIME (BDR Mode1)

Lock to Preamble Data

1250.00 Mbps

Bits

1244.16 Mbps

Bits

622.08 Mbps

Bits

155.52 Mbps

Bits

POWER SUPPLY VOLTAGE

3.0

3.3

3.6

POWER SUPPLY CURRENT

Serial output mode

204

Deserializer mode

250

OPERATING TEMPERATURE RANGE

−40

+85

°C

BDR mode = burst clock and data recovery mode, whereas CDR = continuous clock and data recovery mode.

JITTER SPECIFICATIONS

TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 μF, input data pattern: PRBS 223 − 1, unless otherwise noted.

Table 2.

Parameter

Conditions

Min

Typ

Max

Unit

PHASE-LOCKED LOOP CHARACTERISTICS

Jitter Tolerance

1250.00 Mbps, 223 − 1 PRBS

50 kHz

3.0

UI p-p

500 kHz

1.0

UI p-p

10 MHz

0.5

UI p-p

1244.16 Mbps, 223 − 1 PRBS

50 kHz

3.0

UI p-p

500 kHz

1.0

UI p-p

10 MHz

0.5

UI p-p

622.08 Mbps, 223 − 1 PRBS

25 kHz

2.5

UI p-p

250 kHz

1.0

UI p-p

155.52 Mbps, 223 − 1 PRBS

6.5 kHz

3.5

UI p-p

65 kHz

1.0

UI p-p

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