Multirate 155 Mbps/622 Mbps/1244 Mbps/1250 Mbps

Burst Mode Clock and Data Recovery IC with Deserializer

Data Sheet

ADN2855

Rev. B

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FEATURES

Serial data input

155.52 Mbps/622.08 Mbps/1244.16 Mbps/1250.00 Mbps

12-bit acquisition time

4-bit parallel LVDS output interface

Patented dual-loop clock recovery architecture

Integrated PRBS generator

Byte rate reference clock

Loss-of-lock indicator

Supports double data rate (DDR)-compatible FPGA

Single-supply operation: 3.3 V

Power

670 mW typical in serial output mode

825 mW typical in deserializer mode

5 mm × 5 mm, 32-lead LFCSP

APPLICATIONS

Passive optical networks

GPON/BPON/GEPON OLT receivers

GENERAL DESCRIPTION

The ADN2855 is a burst mode clock and data recovery IC

designed for GPON/BPON/GEPON optical line terminal (OLT)

receiver applications. The part can operate at 155.52 Mbps,

622.08 Mbps, 1244.16 Mbps, or 1250.00 Mbps data rates, selectable

The ADN2855 frequency locks to the OLT reference clock and

aligns to the input data within 12 bits of the start of the preamble.

The device provides a full rate or an optional half rate output

clock for a double data rate (DDR) interface to an FPGA or

digital ASIC.

All specifications are quoted for −40°C to +85°C ambient tempera-

ture, unless otherwise noted. The ADN2855 is available in a

compact 5 mm × 5 mm, 32-lead chip scale package.

FUNCTIONAL BLOCK DIAGRAM

2

RESET

DATAV

DATxP,

DATxN

2

VCC

VEE

SDA

SCK

CF1

CF2

PIN

NIN

CML INPUT

BUFFER

VCO

PHASE

SHIFTER

PHASE

DETECT

FREQUENCY/

LOCK

DETECT

DATA

RE-TIMING

DIVIDER

DESERIALIZER

LOOP

FILTER

LOOP

FILTER

4 × 2

REFCLKP,

REFCLKN

CLKOUTP,

CLKOUTN

SQUELCH

ADN2855

Figure 1.