MAX30002 datasheet(12/44 Pages) MAXIM

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BUMP

NAME

FUNCTION

WLP

TQFN

DGND

Digital Ground for Both Digital Core and I/O Pad Drivers. Recommended to connect

to AGND plane.

CPLL

PLL Loop Filter Input. Connect 1nF capacitor between CPLL and AGND.

VREF

ADC Reference Buffer Output. Connect a 10μF X5R ceramic capacitor between

VREF and AGND.

INTB

Interrupt Output. INTB is an active-low status output. It can be used to interrupt an

external device. INTB is three-stated when disabled.

OVDD

Logic Interface Supply Voltage.

FCLK

32.768kHz Clock Input. FCLK Controls the sampling of the internal sigma-delta

converter and decimator and derives all the internal clocks.

DVDD

Digital Core Supply Voltage. Connect to AVDD.

AVDD

Analog Core Supply Voltage. Connect to DVDD.

INT2B

Interrupt 2 Output. INT2B is an active-low status output. It can be used to interrupt

an external device. INT2B is three-stated when disabled.

SDO

Serial Data Output. SDO will change state on the falling edge of SCLK when CSB is

low. SDO is three-stated when CSB is high.

SDI

Serial Data Input. SDI is sampled into the device on the rising edge of SCLK when

CSB is low.

SCLK

Serial Clock Input. Clocks data in and out of the serial interface when CSB is low.

CSB

Active-Low Chip-Select Input. Enables the serial interface.

—

Exposed Pad. Connect EP to AGND.

Pin Description (continued)

MAX30002

Ultra-Low-Power, Single-Channel Integrated

Bioimpedance (BioZ) AFE

www.maximintegrated.com

Maxim Integrated │ 12

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