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LT3757 Datasheet(PDF) 17 Page - Analog Devices |
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LT3757 Datasheet(HTML) 17 Page - Analog Devices |
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17 / 48 page ![]() LTC7841 17 Rev. 0 For more information www.analog.com OPERATION Start-Up (SS Pin) The start-up of the controller’s output voltage VOUT is controlled by the voltage on the SS pin. When the volt- age on the SS pin is less than the internal reference, the LTC7841 regulates the VFB voltage to the SS pin voltage instead of the reference. This allows the SS pin to be used to program a soft-start by connecting an external capaci- tor from the SS pin to SGND. An internal 10μA pull-up current charges this capacitor creating a voltage ramp on the SS pin. As the SS voltage rises linearly from 0V to the reference (and beyond up to INTVCC), the output voltage rises smoothly to its final value. Light Load Current Operation—Burst Mode Operation, Pulse-Skipping or Continuous Conduction (PLLIN/MODE Pin) The LTC7841 can be enabled to enter high efficiency Burst Mode operation, constant-frequency, pulse-skip- ping mode or forced continuous conduction mode at low load currents. To select Burst Mode operation, tie the PLLIN/MODE pin to ground (e.g., SGND). To select forced continuous operation, tie the PLLIN/MODE pin to INTVCC. To select pulse-skipping mode, tie the PLLIN/ MODE pin to a DC voltage greater than 1.2V and less than INTVCC – 1.3V. When the controller is enabled for Burst Mode opera- tion, the minimum peak current in the inductor is set to approximately 30% of the maximum sense voltage even though the voltage on the ITH pin indicates a lower value. If the average inductor current is higher than the required current, the error amplifier EA will decrease the voltage on the ITH pin. When the ITH voltage drops below 0.425V, the internal sleep signal goes high (enabling sleep mode) and both external MOSFETs are turned off. In sleep mode much of the internal circuitry is turned off and the LTC7841 draws only 800μA of quiescent current. In sleep mode the load current is supplied by the output capacitor. As the output voltage decreases, the EA’s out- put begins to rise. When the output voltage drops enough, the sleep signal goes low and the controller resumes nor- mal operation by turning on the bottom external MOSFET on the next cycle of the internal oscillator. When the controller is enabled for Burst Mode opera- tion, the inductor current is not allowed to reverse. The reverse current comparator (IREV) turns off the top exter- nal MOSFET just before the inductor current reaches zero, preventing it from reversing and going negative. Thus, the controller operates in discontinuous current operation. In forced continuous operation or when clocked by an external clock source to use the phase-locked loop (see the Frequency Selection and Phase-Locked Loop section), the inductor current is allowed to reverse at light loads or under large transient conditions. The peak inductor cur- rent is determined by the voltage on the ITH pin, just as in normal operation. In this mode, the efficiency at light loads is lower than in Burst Mode operation. However, continuous operation has the advantages of lower output voltage ripple and less interference to audio circuitry, as it maintains constant-frequency operation independent of load current. When the PLLIN/MODE pin is connected for pulse-skip- ping mode, the LTC7841 operates in PWM pulse-skipping mode at light loads. In this mode, constant-frequency operation is maintained down to approximately 1% of designed maximum output current. At very light loads, the current comparator ICMP may remain tripped for several cycles and force the external bottom MOSFET to stay off for the same number of cycles (i.e., skipping pulses). The inductor current is not allowed to reverse (discontinuous operation). This mode, like forced continuous operation, exhibits low output ripple as well as low audio noise and reduced RF interference as compared to Burst Mode operation. It provides higher low current efficiency than forced continuous mode, but not nearly as high as Burst Mode operation. Frequency Selection and Phase-Locked Loop (FREQ and PLLIN/MODE Pins) The selection of switching frequency is a trade-off between efficiency and component size. Low frequency opera- tion increases efficiency by reducing MOSFET switching losses, but requires larger inductance and/or capacitance to maintain low output ripple voltage. |
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