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TAS2780 Datasheet(PDF) 69 Page - Texas Instruments |
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TAS2780 Datasheet(HTML) 69 Page - Texas Instruments |
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69 / 96 page ![]() Bit Field Type Reset Description 5-0 PVDD_UVLO_TH[5:0] RW 00h PVDD UVLO Thresholds. 00h = 1.753V 01h = 2.09V 02h = 2.428V ........... 63h= 23V 8.9.102 DMD (page=0x00 address=0x73) [reset=00h] Bit Field Type Reset Description 7-6 DAC_DEM_CTRL R 0h DAC MSB and LSB DEM enable/disable control 0h = MSB Enabled, LSB = Enabled 1h = MSB Enabled, LSB = Disabled 2h = MSB Disabled, LSB = Enabled 3h = MSB Disabled, LSB = Disabled - Recommended for ultrasonic use case 5 DIS_DITHER RW 0h DAC MSB modulator dither control 0b = Enabled 1b = Disabled - Recommended for ultrasonic use case 4-0 Reserved R 00 Reserved 8.9.103 RSVD0 (page=0x00 address=0x7D) Bit Field Type Reset Description 7-4 Reserved R x To be ignored 3-0 Reserved R x To be ignored 8.9.104 I2C_CKSUM (page=0x00 address=0x7E) [reset=00h] Bit Field Type Reset Description 7-0 I2C_CKSUM[7:0] RW 0h Returns I2C checksum. Writing to this register will reset the checksum to the written value. This register is updated on writes to other registers on all books and pages. 8.9.105 BOOK (page=0x00 address=0x7F) [reset=00h] Bit Field Type Reset Description 7-0 BOOK[7:0] RW 0h Sets the device book. 00h = Book 0 01h = Book 1 ... FFh = Book 255 8.9.106 LSR (page=0x01 address=0x19) [reset=40h] Bit Field Type Reset Description 7 Reserved R 0b Reserved 6 EN_LLSR RW 1b Modulation 0b = LSR 1b = Linear LSR 5-0 Reserved R 0h Reserved www.ti.com TAS2780 SLOSE75 – NOVEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 69 Product Folder Links: TAS2780 |
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