AM79C850KC datasheet(34/97 Pages) AMD

34 / 97 page

AMD

P R E L I M I N A R Y

SUPERNET 3

MAC

RXAFU 3:0, RXAFL 3:0, RXAFCU, RXAFCL

PHY A

PHY B

PDTR

RX+, RX–

TX+, TX–

X9:0

R9:0

19574A-8

PDTR: Phy Data Transmit and Receive Functions

SUPERNET 3

Figure 7. WRAP_B Configuration

MAC

RXAFU 3:0, RXAFL 3:0, RXAFCU, RXAFCL

PHY A

PDTR

RX+, RX–

TX+, TX–

X9:0

R9:0

19574A-9

PDTR: Phy Data Transmit and Receive Functions

DAS/SAS Selection Mux

SUPERNET 3

Figure 8. WRAP_S or SAS Configuration

Changes and Enhancements to PHY

Changes from SUPERNET 2 PLC

Addition of Scrambler/Descrambler

Scrambler/descrambler is implemented. Scrambling/

descrambling can be disabled either through a pin or

through bit 0 in the PLC_CNTRL_C register.

ENCOFF pin function changed

The function of this pin has changed slightly. In addition

to turning off the Encoder (as in SUPERNET 2 PLC), this

pin, when asserted, now also turns off the Decoder.

BIST enhanced

The Built-In Self Test (BIST) test now covers part of the

Elasticity Buffer and Framer logic.

Revision Identification

SUPERNET

PHY,

bits

15:11

the

PLC_STATUS_A register will indicate 01111 on a read

operation. The Revision ID for SUPERNET 2 PLC-S

is 11111.

AM79C850KC Datasheet(PDF) 34 Page - Advanced Micro Devices

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