ADAQ23876BBCZ datasheet(5/37 Pages) AD

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Data Sheet

ADAQ23876

SPECIFICATIONS

analog.com

Rev. 0 | 5 of 37

Table 1.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit1

Gain = 2.25

−66.8

Spurious-Free Dynamic Range (SFDR)

fIN = 1 kHz

Gain = 0.37

106.4

Gain = 0.73 and gain = 0.87

123

Gain = 1.38

117.1

Gain = 2.25

115.5

fIN = 100 kHz

Gain = 0.37

100

Gain = 0.73, gain = 0.87, gain = 1.38, and gain = 2.25

104

fIN = 1MHz

Gain = 0.73

74.8

Gain = 0.87

71.8

Gain = 1.38

70.5

Gain = 2.25

68.1

−3 dB Input Bandwidth, RC Filter

Output voltage (VOUT) differential (VOUTDIFF) = 2 V p-p

MHz

Aperture Delay9

Aperture Jitter10

0.25

psRMS

REFERENCE

REFIN, Internal Reference Output Voltage

Output current (IOUT) = 0 μA

2.028

2.048

2.068

Temperature Coefficient

±5

±20

ppm/°C

Output Impedance

kΩ

Line Regulation

VDD = 4.75 V to 5.25 V

0.3

mV/V

Input Voltage Range

REFIN overdriven

2.028

2.048

2.068

Reference Buffer Output Voltage, REFBUF

REFIN = 2.048 V

4.056

4.096

4.136

Input Voltage Range

REFBUF overdriven10

4.056

4.096

4.136

Load Current

REFBUF = 4.096 V (REFBUF overdriven)

1.75

1.95

REFBUF = 4.096 V (REFBUF overdriven)

0.5

VCMO11

Common-Mode Output Voltage

REFBUF = 4.096 V, IOUT = 0 μA

2.028

2.048

2.028

Output Impedance

–1 mA < IOUT < +1 mA

Ω

DIGITAL INPUTS

Logic Levels

Input Low Voltage, VIL

VIO = 2.5 V

0.6

Input High Voltage, VIH

VIO = 2.5 V

1.7

Digital Input Current

VIN = 0 V to 2.5 V

−10

+10

µA

Input Pin Capacitance

CNV+/CNV– and CLK+/CLK– (LVDS Clock

Input)

Differential Input Voltage, VID

175

350

650

Common-Mode Input Voltage, VICM

0.8

1.25

1.7

DCO+/DCO–, DA+/DA–, DB+/DB– (LVDS

Outputs)

Differential Output Voltage, VOD

100 Ω differential load

247

350

454

Common-Mode Output Voltage, VOS

100 Ω differential load

1.125

1.25

1.375

POWER-DOWN MODE

ADC Driver (PDB_AMP)/ADC (PDB_ADC)

Low

Power-down mode

High

Enabled, normal operation

>1.7

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