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SPC582BX Datasheet(PDF) 1 Page - STMicroelectronics |
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SPC582BX Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 115 page  This is information on a product in full production. December 2020 DS11597 Rev 4 1/115 SPC582Bx SPC58 2B Line - 32 bit Power Architecture automotive MCU Single core 80Mhz, 1MByte Flash, ASIL-B Datasheet - production data Features • AEC-Q100 qualified • High performance e200z2 single core – 32-bit Power Architecture technology CPU – Core frequency as high as 80 MHz – Variable Length Encoding (VLE) – Floating Point, End-to-End Error Correction • 1088 KB (1024 KB code flash + 64 KB data flash) on-chip flash memory: supports read during program and erase operations, and multiple blocks allowing EEPROM emulation • 96 KB on-chip general-purpose SRAM • Multi-channel direct memory access controller (eDMA) with 16 channels • 1 interrupt controller (INTC) • Comprehensive new generation ASIL-B safety concept – ASIL-B of ISO 26262 – FCCU for collection and reaction to failure notifications – Memory Error Management Unit (MEMU) for collection and reporting of error events in memories – Cyclic redundancy check (CRC) unit – End-to-end Error Correction Code (e2eECC) logic • Crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus masters with end-to-end ECC • Body cross triggering unit (BCTU) – Triggers ADC conversions from any eMIOS channel – Triggers ADC conversions from up to 2 dedicated PIT_RTIs – 1 event configuration register dedicated to each timer event allows to define the corresponding ADC channel – Synchronization with ADC to avoid collision • 1 enhanced 12-bit SAR analog-to-digital converters – Up to 27 channels – enhanced diagnosis feature • Communication interfaces – 6 LINFlexD modules – 4 deserial serial peripheral interface (DSPI) modules – 7 MCAN interfaces with advanced shared memory scheme and ISO CAN FD support • Dual phase-locked loops with stable clock domain for peripherals and FM modulation domain for computational shell • Nexus Class 3 debug and trace interface • Boot assist Flash (BAF) supports factory programming using a serial bootload through the asynchronous CAN or LIN/UART. • Enhanced modular IO subsystem (eMIOS): up to 32 timed I/O channels with 16-bit counter resolution • Advanced and flexible supply scheme – On-chip voltage regulator for 1.2 V core logic supply. • Junction temperature range -40 °C to 150 °C eTQFP100 (14 x 14 x 1.0 mm) eTQFP64 (10 x 10 x 1.0 mm) QFN48 (7 x7 x0.9 mm) www.st.com |
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