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RT600 Datasheet(PDF) 159 Page - NXP Semiconductors

Part # RT600
Description  Dual-core microcontroller with 32-bit Cortex짰-M33 and Xtensa HiFi4 Audio DSP CPUs; Up to 4.5 MB SRAM; FlexSPI with cache and dynamic decryption; High-speed USB device/host Phy; 12-bit 1 Msamples/s ADC; Analog Comparator; Audio
PDF  167 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

RT600 Datasheet(HTML) 159 Page - NXP Semiconductors

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RT600
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors B.V. 2022. All rights reserved.
Product data sheet
Rev. 2.0 — 1 April 2022
159 of 165
NXP Semiconductors
RT600
Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4
Audio DSP CPUs
21. Revision history
Table 57.
Revision history
Document ID
Release date Data sheet status
Change notice Supersedes
RT600 v.2.0
20220401
Product data sheet
-
1.9
• In Section 7 “Pinning information” updated details of GPIO pins.
• In Table 6 “Termination of unused pins” updated default state of all PIOn pins.
• Updated Section 10.15.1 “Features” to read all GPIO default to high impedance after
reset.
• In Table 18 “Limiting values”, Table 20 “General operating conditions”, and in Table 21
“General operating conditions” updated VDDCORE maximum value.
• In Section 13.2 “Power Sequencing” added no delay requirement on the external reset
pin when using internal LDO and when the pin is tied high.
• In Table 30 “Static characteristics: pin characteristics” added Table note 5 “PMIC mode
pins are dedicated outputs. They are hard wired to normal drive, no input buffer, no pull
ups or pull downs, and no slew rate control.” and Table note 6 “Based on simulation,
not tested in production.”.
• Updated fail-safe and high-speed GPIO pins detail and their diagram in Section 16.2
“Standard I/O pin configuration”.
• In Section 16.4 “RTC oscillator” updated XTALIN, XTALOUT, and CLOCKOUT pins to
RTCXIN, RTCXOUT, and CLKOUT respectively.
• In Section 16.5 “XTAL oscillator” updated drive XTALIN with a 0.8 V to 1.8V square
wave instead of <0.7V to 1.8V.
• Added Table note 9 “Fall-time spec can be found in Table 30 “Static characteristics: pin
characteristics” in Figure 10 “I2C-bus pins clock timing[9]”.
• Removed below footnote from Table 4 “Pin description”:
a. Pad with programmable glitch filter; provides digital I/O functions with TTL levels
and hysteresis; normal drive strength.
b. Pin providing standard digital I/O functions with configurable modes, configurable
hysteresis, and analog input.
• Updated recommended termination of unused pins in Table 6 “Termination of unused
pins”.
• Updated Section 10.14.2 “Deep-sleep mode”.
• In Table 18 “Limiting values” added USB1_VBUS and updated footnote[2] to
“Maximum/minimum voltage above the maximum operating voltage and below ground
should be avoided as proper operation cannot be guaranteed and could lead to
irrecoverable failure. Failure includes the loss of reliability and shorter lifetime of the
device.”
• In Section 14.9 “I2S-bus interface” added maximum and minimum supported bit.
• In Table 41 “Dynamic characteristics: I2S-bus interface pins [1][3]”:
a. updated
VDDCORE = 1.13 V; CL = 10 pF
b. Removed footnote “Typical ratings are not guaranteed”.
c. Updated tWH and tWL minimum and maximum unit.
• Added Section 14.7 “Main/System and Audio PLLs”.
• Added MCLK pin values in Section 14.6 “External Clock Input (CLKIN pin, MCLK pin)”.
• Updated footnote [3] clock frequency from 48 MHz to 140 MHz in Table 41 “Dynamic
characteristics: I2S-bus interface pins [1][3]”.
RT600 v.1.9
20211230
Product Data Sheet
-
1.8
• Removed RT633 device from Table 2 “Ordering options 4”.



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