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LM5072 Datasheet(PDF) 14 Page - National Semiconductor (TI) |
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LM5072 Datasheet(HTML) 14 Page - National Semiconductor (TI) |
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14 / 24 page ![]() Inrush Current Limit Programming (Continued) will turn on the hot swap MOSFET in a constant current mode. The default, pre-programmed inrush current of 150 mA can be selected by simply leaving the ICL_FAUX pin open. To adjust the capacitor charging time for a particular appli- cation requirement, the inrush limit can be programmed to any value between 150 and 400 mA with an external resistor (R ICL) between the ICL_FAUX and VEE pins, as shown in Figure 7. The relationship between the R ICL value and the desired inrush current limit I INRUSH satisfies the following equation: The inrush current causes a voltage drop along the PoE Ethernet cable (20 Ω maximum) that reduces the input volt- age sensed by the LM5072. To avoid erratic turn-on (hic- cups), I INRUSH should be programmed such that the input voltage drop due to cable resistance does not exceed the V IN-UVLO hysteresis (6V minimum). DC Current Limit Programming The LM5072 provides a default DC current limit of 440 mA nominal. This default limit can be selected by leaving the DCCL pin open. The LM5072 allows the DC current limit to be programmed within the range from 150 mA to 800 mA. Figure 8 shows the method to program the DC current limit with an external resistor, R DCCL. The relationship between the RDCCL value and the desired DC current limit I DC satisfies the following equation: The maximum recommended DC current limit is 800 mA. While thermal analysis should be a standard part of the module development process, it may warrant additional at- tention if the DC current limit is programmed to values in excess of 400 mA. This analysis should include evaluations of the dissipation capability of LM5072 package, heat sinking properties of the PC Board, ambient temperature, and other heat dissipation factors of the operating environment. Power Good and Regulator Startup The Power Good status indicates that the circuit is ready for PWM controller startup to occur. It is established when the input capacitors are fully charged through the hot swap MOSFET. Since the hot swap MOSFET is in series with the input capacitors of the DC-DC converter, its drain-to-source voltage decreases as the charging occurs. Power Good is indicated when the following two conditions are met: the MOSFET drain-to-source voltage drops below 1.5V (with 1V hysteresis), and the gate-to-source voltage is greater than 5V. Circuitry internal to the LM5072 monitors both the drain and gate voltages (see Figure 1), and issues the Power Good status flag by pulling down the nPGOOD pin to a logic low level relative to the ARTN pin. The nPGOOD circuitry consists of a 2.5V comparator, a 130 Ω pull down MOSFET, and a 50 µA pull up current source, as shown in Figure 9. Once the Power Good status is established, the nPGOOD pin voltage will be pulled down quickly by the MOSFET, and the PWM controller will start as soon as the nPGOOD pin voltage drops below the 2.5V threshold. 20184622 FIGURE 7. Input Inrush Limit Programming via R ICL 20184624 FIGURE 8. Input DC Current Limit Programming via R DCCL www.national.com 14 |
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