Data Sheet

ADN4620/ADN4621

3.75 kV RMS, Dual-Channel LVDS 2.5 Gigabit Isolator

Rev. 0

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FEATURES

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3.75 kV rms LVDS isolators

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Complies with TIA/EIA-644-A LVDS signal levels

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Dual-channel configuration (ADN4620: 2 + 0, ADN4621: 1 + 1)

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Any data rate up to 2.5 Gbps switching with low jitter

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5 Gbps total bandwidth across two channels

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2.15 ns typical propagation delay

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Typical jitter: 0.82 ps rms random, 40 ps total peak-to-peak

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Lower power 1.8 V supplies with 3.3 V supplies for I/O

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±7 kV IEC 61000-4-2 ESD protection across isolation barrier

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High common-mode transient immunity: 70 kV/μs typical

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Safety and regulatory approvals (20-lead SSOP package)

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UL (pending): 3750 V rms for 1 minute per UL 1577

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CSA Component Acceptance Notice 5A (pending)

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VDE certificate of conformity, reinforced insulation (pending)

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DIN V VDE V 0884-11 (VDE V 0884-11):2017-01

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Enable or disable refresh (low speed output correctness check)

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Operating temperature range: −40°C to +125°C

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Compact SSOP package with 5.3 mm creepage

APPLICATIONS

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Analog front-end isolation

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Data plane isolation

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Isolated high speed clock and data links

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Multigigabit serialization/deserialization (SERDES)

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PCB-to-PCB optical replacement (for example, short reach fiber)

FUNCTIONAL BLOCK DIAGRAMS

Figure 1. ADN4620 Two Forward Channels

Figure 2. ADN4621 One Forward and One Reverse Channel

GENERAL DESCRIPTION

The ADN4620/ADN46211 are dual-channel, signal isolated, low

voltage differential signaling (LVDS) buffers that operate at up to

2.5 Gbps with very low jitter. The devices integrate Analog Devices,

to provide drop-in galvanic isolation of LVDS signal chains. AC

coupling and/or level shifting to the LVDS receivers and from the

LVDS drivers allows isolation of other high speed signals, such as

current mode logic (CML).

The ADN4620/ADN4621 include a refresh mechanism to monitor

the input and output states and ensure that they remain the same

in the absence of data transitions (for example, at power-on). For

lower power consumption and high speed operation with low jitter,

the isolator circuits rely on 1.8 V supplies, while 3.3 V supplies are

used for LVDS receivers to support the full common-mode range

with an input voltage range (input common mode plus differential

input voltage) of 0 V to 2.4 V per Table 2.

The devices are fully specified over a wide industrial temperature

range and are available in a compact SSOP package with 5.3 mm

creepage (for reinforced insulation at ac mains voltages).