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STA1295 Datasheet(PDF) 54 Page - STMicroelectronics |
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STA1295 Datasheet(HTML) 54 Page - STMicroelectronics |
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54 / 109 page ![]() Package pinouts and signal description STA1295, STA1275 54/109 DS12586 Rev 5 DDR_DQS3 — AC7 I/O DDR_VIO Data strobe byte 3 DDR_DQS3n — AB7 I/O DDR_VIO Inverted data strobe byte 3 DDR_RESETn — AC5 O DDR_VIO Reset DDR_RASn — R1 O DDR_VIO Command signal row address strobe DDR_CASn — R2 O DDR_VIO Command signal column address strobe DDR_WEn — R6 O DDR_VIO Command signal write enable DDR_AD15 — V6 O DDR_VIO Address line 15 DDR_AD14 — Y5 O DDR_VIO Address line 14 DDR_AD13 — W5 O DDR_VIO Address line 13 DDR_AD12 — W4 O DDR_VIO Address line 12 DDR_AD11 — AA5 O DDR_VIO Address line 11 DDR_AD10 — AB4 O DDR_VIO Address line 10 DDR_AD9 — AC4 O DDR_VIO Address line 9 DDR_AD8 — Y3 O DDR_VIO Address line 8 DDR_AD7 — AA3 O DDR_VIO Address line 7 DDR_AD6 — AB3 O DDR_VIO Address line 6 DDR_AD5 — AC3 O DDR_VIO Address line 5 DDR_AD4 — AA2 O DDR_VIO Address line 4 DDR_AD3 — AB2 O DDR_VIO Address line 3 DDR_AD2 — Y2 O DDR_VIO Address line 2 DDR_AD1 — AA1 O DDR_VIO Address line 1 DDR_AD0 — V4 O DDR_VIO Address line 0 DDR_DTO_0 — V5 I DDR_VIO Test signal DDR_DTO_1 — U5 I DDR_VIO Test signal DDR_ZQ — J6 I DDR_VIO Calibration reference DDR_ATO — AB5 I DDR_VIO Test signal Table 26. Memory signals (continued) Name GPIOs BALLs DIR Power domain Description |
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