STA1295 datasheet(93/109 Pages) STMICROELECTRONICS

93 / 109 page

DS12586 Rev 5

93/109

STA1295, STA1275

Electrical characteristics

106

4.12

Regulator specifications

4.12.1

Always-on LDO (3V3TO1V2 low power regulator)

4.12.2

VDDIO_ON main voltage detector

4.12.3

PLL LDO (3V3TO2V5 low power regulator)

Table 49. 3V3TO1V2 low power regulator

Symbol

Parameter

Limit values

Unit

Min.

Typ. Max.

VASupply

Analog supply

3.0

3.3

3.6

Vout(@100μA)

Output voltage @ Iload = max

1.14

1.2

1.26

Cload

Total off chip capacitance value(1)

1. This is mandatory for proper device functionality.

——

2.2

PSRR

Power supply rejection at DC @ Full load

—

-50

-40

PSRR

Power supply rejection at 1 MHz @ Full load

—

-50

-40

Tstart

Start up time from power down to active

—

500

μs

Table 50. VDDIO_ON supply LVD

Symbol

Parameter

Limit values

Unit

Min.

Typ.

Max.

Vuthres P

Upper voltage threshold (Value @ 27C, 0 sigma)

Sigma: 12 mV

2.78

—

2.92

Vlthres P

lower voltage threshold (Value @ 27C, 0 sigma)

Sigma: 12 mV

2.69

—

2.83

Vhyst S Hysteresis

—

Table 51. 3V3TO2V5 regulator

Symbol

Parameter

Limit values

Unit

Min.

Typ.

Max.

VASupply

SR Analog supply

3.0

3.3

3.6

Vout

P Output voltage @ Iload = max

2.375

2.5

2.63

Cload

Total off chip capacitance values (1)

—4.7

—

µF

ESR of each external capacitor in frequency range

of 100 kHz - 100 MHz

10 m

—

150 m

PSRR_DC

S Power supply rejection at DC @ NO load

—

-23

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