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CS43131 Datasheet(PDF) 13 Page - Cirrus Logic

Part # CS43131
Description  130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver and Impedance Detection
PDF  156 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43131 Datasheet(HTML) 13 Page - Cirrus Logic

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DS1155F1
13
CS43131
3 Characteristics and Specifications
Table 3-3. Absolute Maximum Ratings
Test conditions (unless otherwise specified): GNDD = GNDA= GNDCP = 0 V; all voltages with respect to ground.
Parameters
Symbol
Minimum
Maximum
Units
DC power supply
Analog
Battery
Charge pump
Filtered charge pump (positive)
Filtered charge pump (negative)
Digital interface
Digital internal
VA
VP
VCP
VCP_FILT+
VCP_FILT–
VL
VD
–0.3
–0.3
–0.3
–0.3
–3.3
–0.3
–0.3
2.33
6.3
2.33
3.3
0.3
2.33
2.33
V
V
V
V
V
V
V
Input current 1
1.Any pin except supplies and HPINx. Transient currents of up to ±100 mA on the analog input pins do not cause SCR latch-up.
Iin
—±10
mA
Ambient operating temperature (power applied)
TA
–50
+115
°C
Storage temperature
Tstg
–65
+150
°C
Caution: Stresses beyond “Absolute Maximum Ratings” levels may cause permanent damage to the device. These levels are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in Table 3-2, “Recommended Operating
Conditions” is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 3-4. Analog Output Characteristics (HV_EN = 1) 1
Test conditions (unless otherwise specified): Fig. 2-1 shows CS43131 connections; input test signal is a 32-bit, full-scale 997-Hz sine wave (unless
specified otherwise); GNDA = GNDCP = GNDD = 0 V; voltages are with respect to ground; HV_EN = 1; ASP_M/Sb = 1; typical, min/max performance
data taken with VA = VCP = 1.8 V; VL = VD = 1.8 V; VP = 3.6 V; TA = +25°C; measurement bandwidth is 20 Hz–20 kHz; ASP_SPRATE = 0001 (LRCK
= 44.1-kHz mode); PDN_XTAL = 0, MCLK_INT = 1, PLUS_1DB = 0, and MCLK_SRC_SEL = 00 (crystal frequency fXTAL = 22.5792 MHz);
Volume = 0 dB; when testing in DSD processor mode, DSD_ZERODB = 1
; when testing noise related specifications (dynamic range, THD+N, idle
channel noise), no external impedance on HPREFx.
PCM and DSD Processor Mode Parameter 2,3,4
Minimum
Typical
Maximum
Units
HPOUTx
RL = 10 k
CL = 200 pF
OUT_FS = 11
Volume = 0 dB
+1dB_EN = 0,5
unless otherwise
specified
Dynamic range
(defined in Table 3-1)
24-bit, 32-bit, DSD
16-bit
A-weighted
Unweighted
A-weighted
Unweighted
124
121
91
88
130
127
97
94
dB
dB
dB
dB
THD+N
(defined in Table 3-1)
24-bit, 32-bit
16-bit
DSD
0 dB
–20 dB
–60 dB
0 dB
–20 dB
–60 dB
0 dB
–20 dB
–60 dB
–115
–97
–67
–94
–74
–34
–108
–97
–67
–109
–61
–88
–28
–101
–61
dB
dB
dB
dB
dB
dB
dB
dB
dB
Idle channel noise
(A-weighted)
(defined in Table 3-1)
24-bit, 32-bit, DSD
0.55
µV
Full-scale output voltage
4.66
4.90
5.14
Vpp
Interchannel isolation 6(defined in Table 3-1)
217 Hz
1 kHz
20 kHz
120
120
100
dB
dB
dB
HPOUTx
RL = 10 k
CL = 200 pF
OUT_FS = 11
Volume = 0 dB
+1dB_EN = 1,
unless otherwise
specified
THD+N
(defined in Table 3-1)
24-bit, 32-bit, DSD
0 dB
–105
dB
Full-scale output voltage
5.42
5.70
5.99
Vpp



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