LTC4292 datasheet(27/44 Pages) AD

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LTC9101-2/LTC9102

Rev. 0

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APPLICATIONS INFORMATION

The TLIM register is used to adjust the tLIM setting for each

channel and is a minimum time. Two bits are assigned

to each channel, as shown in Table 14. These bits are

automatically set during startup in Auto mode. tLIM can

be adjusted while a channel is active.

Table 14. TLIM Settings

FIELD

TLIM

00b (Default)

Type 1 TLIM 50ms

01b

Spare TLIM 15ms

10b

Type 2 and 3 TLIM 10ms

11b

Type 4 TLIM 6ms

When a channel ILIM event occurs, if the corresponding

port’s 4P ILIM Behavior bit is set and a Single-Signature

PD is 4-Pair powered, both channels will be turned off

and both ILIM faults will be set.

MOSFET Fault Detection

LTC9101-2/LTC9102 PSE ports are designed to tolerate

significant levels of abuse, but in extreme cases it is pos-

sible for an external MOSFET to be damaged. A failed

MOSFET may short source to drain, which will make the

port appear to be on when it should be off; this condition

may also cause the sense resistor to fuse open, turning

off the port but causing SENSE to rise to an abnormally

high voltage. A failed MOSFET may also short from gate to

drain, causing GATE to rise to an abnormally high voltage.

OUT, SENSE and GATE are designed to tolerate up to 80V

faults without damage.

If the LTC9101-2/LTC9102 detects any of these condi-

tions for more than 3.8ms, it disables all port functionality,

reduces the gate drive pull-down current for the port and

reports a MOSFET Fault detection status. This is typically

a permanent fault, but the host can attempt to recover by

resetting the port, setting the port to shutdown mode, or

by resetting the entire chip if a port reset fails to clear the

fault. If the MOSFET is in fact bad, the fault will quickly

return, and the port will disable itself again. The remaining

ports of the LTC9101-2/LTC9102 are unaffected.

An open or missing MOSFET will not trigger a MOSFET

Fault detection status, but will cause a start fault if the

LTC9101-2/LTC9102 attempts to turn on the port.

In particular, the port policing feature may be used to

ensure delivery of PD Class power while staying below

100W Limited Power Source (LPS) requirements.

Channel Power Policing

The channel power policing threshold (2P Police) is

monitored on a per-channel basis, up to 128W in 0.5W

increments (typical). When the channel output power

over a one second moving average exceeds the specified

threshold, power will be removed from the channel and

the corresponding PCUT fault will be set.

When a channel 2P Police event occurs, if the correspond-

ing port’s 4P PCUT Behavior bit is set and a 4P SS PD is

powered, both channels will be turned off and both PCUT

faults will be set.

Current Limit

Each LTC9101-2/LTC9102 channel includes an implicit

current limiting threshold (ILIM-2P), with a correspond-

ing timer (tLIM). The ILIM-2P threshold is a function of the

applied 2P Police threshold as shown in Table 12 and

Table 13.

Table 12. ILIM Values, Single-Signature PD

2P POLICE

ILIM

0.5W to 15.5W

425mA

16W to 45W

850mA

45.5W to 53.5W

1063mA

54W and Higher

1167mA

Table 13. ILIM Values, Dual-Signature PD

2P POLICE

ILIM

0.5W to 15.5W

425mA

16W to 30W

850mA

30.5W and Higher

1167mA

The LTC9101-2/LTC9102 will actively control the MOSFET

gate drive to keep the channel current below ILIM-2P. The

LTC9101-2/LTC9102 ILIM-2P threshold is implemented

as a two-stage foldback circuit that reduces the chan-

nel current if the channel voltage falls below the normal

operating voltage. This keeps MOSFET power dissipation

at safe levels. The ILIM-2P current limiting circuit is always

enabled and actively limiting channel current.

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