Data Sheet

LT3041

SPECIFICATIONS

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Rev. 0 | 5 of 36

Table 1. Electrical Characteristics

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

THERMAL SHUTDOWN

TJ rising

169

°C

Hysteresis

5

°C

START-UP TIME

VOUT (NOM) = 5 V, IL = 1 A, CSET = 0.47 µF, VIN = 6 V,

VPGFB = 6 V

55

ms

VOUT (NOM) = 5 V, IL = 1 A, CSET = 4.7 µF, VIN = 6 V,

VPGFB = 6 V

550

ms

VOUT (NOM) = 5 V, IL = 1 A, CSET = 4.7 µF, VIN = 6 V,

Power-Good 1 resistance (RPG1) = 50 kΩ, Power-Good 2

resistance (RPG2) = 700 kΩ (with fast startup to 90% of

VOUT)

10

ms

THERMAL REGULATION

10 ms pulse

–0.01

%/W

DIFFERENTIAL VIOC10

VIOC amplifier gain

1

V/V

VIOC pin voltage range: VOUT > VIOC voltage (VVIOC) +

0.6 V

1

4

V

VIOC pin voltage: VOUT ≤ 1.5 V, VIN = 2.5 V

1

V

VIOC pin source current

300

µA

VIOC pin sink current: VIN ≥ 2.5 V

2

µA

1 The EN/UV pin threshold must be met to ensure device operation.

2 The maximum TJ limits operating conditions. The regulated output-voltage specification does not apply for all possible combinations of input voltage and output current,

especially due to the internal current-limit foldback, which starts to decrease current limit at VIN – VOUT > 11 V. If operating at the maximum output current, limit the

input-voltage range. If operating at the maximum input voltage, limit the output-current range.

3 OUTS ties directly to OUT.

4 Changes in ISET and VOS with VSET are tested at 0.2V, 0.75V, 1.3V, and 15V to insure operation over the 0.2V to 15V SET pin voltage range.

5 The dropout voltage is the minimum input-to-output differential voltage needed to maintain regulation at a specified output current. The dropout voltage is measured when

output is 1% out of regulation. This definition results in a higher dropout voltage compared to hard dropout, which is measured when VIN = VOUT (NOMINAL). For output

voltages less than 1.7 V, the dropout voltage is limited by the minimum input-voltage specification. See Figure 18 for the dropout voltage as a function of the output current

and for temperature see Figure 19, which was measured in a typical application circuit.

6 The GND pin current is tested with VIN = VOUT (NOMINAL) and a current source load. Therefore, the LT3041 is tested while operating in dropout, which is the worst-case

GND pin current. The GND pin current decreases at higher input voltages. Note that the GND pin current does not include the SET pin or the ILIM pin current; however,

quiescent current does include the SET and ILIM pins.

7 Adding a capacitor across the SET pin resistor decreases the output voltage noise. Adding this capacitor bypasses the thermal noise of the resistor on the SET pin as well

as the noise of the reference current. The output noise then equals the error-amplifier noise. Use of a SET pin bypass capacitor also increases the start-up time.

8 The internal back-up current-limit circuitry incorporates foldback protection that decreases current limit for VIN – VOUT > 11 V. Some level of output current is provided at all

VIN – VOUT differential voltages. See Figure 32 for the current limit as a function of VIN – VOUT.

9 The current-limit programming scale factor is specified while the internal backup current limit is not active. Note that the internal current limit has foldback protection for VIN

– VOUT differentials greater than 11 V.

10 The VIOC buffer outputs a voltage equal to VIN – VOUT or VIN – 1.5 V for VOUT ≤ 1.5 V. See Figure 70 and the High-Efficiency Linear Regulator: Voltage Input-to-Output

Control (VIOC) section for further information. Set the source current of the VIOC pin between 10 µA and 300 µA.