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MPC8540 Datasheet(PDF) 583 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 583 Page - Freescale Semiconductor, Inc |
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583 / 1302 page ![]() Functional Description MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 13-79 Figure 13-63. Single-Beat Read Access to FPM DRAM cst1 0 LALE pause (due to change in AMX) 00 Bit 0 cst2 0 0 0 Bit 1 cst3 0 0 0 Bit 2 cst4 0 0 0 Bit 3 bst1 1 1 0 Bit 4 bst2 1 0 0 Bit 5 bst3 1 0 0 Bit 6 bst4 1 0 0 Bit 7 g0l0 Bit 8 g0l1 Bit 9 g0h0 Bit 10 g0h1 Bit 11 g1t1 1 1 1 Bit 12 g1t3 1 1 1 Bit 13 g2t1 Bit 14 g2t3 Bit 15 g3t1 Bit 16 g3t3 Bit 17 g4t1 Bit 18 g4t3 Bit 19 g5t1 Bit 20 g5t3 Bit 21 redo[0] Bit 22 redo[1] Bit 23 loop 0 0 0 Bit 24 exen 0 0 0 Bit 25 amx0 1 0 0 Bit 26 amx1 0 0 0 Bit 27 na 0 0 0 Bit 28 uta 0 0 1 Bit 29 todt 0 0 1 Bit 30 last 0 0 1 Bit 31 RSS RSS+1 RSS+1 RSS+2 LCLK LAD LALE LCSn LGPL1 Address A Row LA Read Data Column Address TA Row lsbs Column lsbs (RAS) LBSn (CAS) LBCTL (R/W) |
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