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ADT7468 Datasheet(PDF) 49 Page - Analog Devices

Part # ADT7468
Description  dBCool??Remote Thermal Controller and Voltage Monitor
PDF  80 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADT7468 Datasheet(HTML) 49 Page - Analog Devices

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ADT7468
Rev. 0 | Page 49 of 80
REAR CHASSIS
FRONT CHASSIS
CPU FAN SINK
LOCAL =
VRM TEMP
PWM1
PWM2
TACH1
TACH2
TACH3
PWM3
REMOTE 1 =
AMBIENT TEMP
REMOTE 2 =
CPU TEMP
MUX
THERMAL CALIBRATION
0%
TMIN
TRANGE
THERMAL CALIBRATION
100%
0%
TMIN
TRANGE
THERMAL CALIBRATION
100%
0%
TMIN
TRANGE
TACHOMETER 1
MEASUREMENT
PWM
CONFIG
PWM
MIN
RAMP
CONTROL
(ACOUSTIC
ENHANCEMENT)
PWM
GENERATOR
TACHOMETER 2
MEASUREMENT
PWM
CONFIG
PWM
MIN
RAMP
CONTROL
(ACOUSTIC
ENHANCEMENT)
PWM
GENERATOR
TACHOMETER 3
AND 4
MEASUREMENT
PWM
CONFIG
PWM
MIN
RAMP
CONTROL
(ACOUSTIC
ENHANCEMENT)
PWM
GENERATOR
100%
TMIN
0%
100%
TRANGE
TTHERM
Figure 66. The THYST Value Applies to Fan On/Off Hysteresis and THERM Hysteresis
Enhance Acoustics Register 1 (Reg. 0x62)
Bit 7 (MIN3) = 0,
PWM3 is off (0% PWM duty cycle) when
temperature is below TMIN − THYST.
Bit 7 (MIN3) = 1,
PWM3 runs at PWM3 minimum duty cycle
below TMIN − THYST.
Bit 6 (MIN2) = 0,
PWM2 is off (0% PWM duty cycle) when
temperature is below TMIN − THYST.
Bit 6 (MIN2) = 1,
PWM2 runs at PWM2 minimum duty cycle
below TMIN − THYST.
Bit 5 (MIN1) = 0,
PWM1 is off (0% PWM duty cycle) when
temperature is below TMIN − THYST.
Bit 5 (MIN1) = 1,
PWM1 runs at PWM1 minimum duty cycle
below TMIN − THYST.
DYNAMIC TMIN CONTROL MODE
In addition to the automatic fan speed control mode described
in the Automatic Fan Control Overview section, the ADT7468
has a mode that extends the basic automatic fan speed control
loop. Dynamic TMIN control allows the ADT7468 to intelligently
adapt the system’s cooling solution for best system performance
or lowest possible system acoustics, depending on user or
design requirements. Use of dynamic TMIN control alleviates the
need to design for worst-case conditions and significantly
reduces system design and validation time.
Designing for Worst-Case Conditions
System design must always allow for worst-case conditions. In
PC design, the worst-case conditions include, but are not
limited to the following:



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