L99DZ100GP datasheet(63/197 Pages) STMICROELECTRONICS

63 / 197 page

DS11546 Rev 5

63/197

L99DZ100G, L99DZ100GP

Electrical specifications

196

Note:

See Figure 17: SPI output timing.

Note:

See Figure 18: SPI CSN - output timing.

3.4.26

Inputs TxD_C and TxD_L for Flash mode

The voltages are referred to ground and currents are assumed positive, when the current

flows into the pin. 6V ≤ VSREG ≤ 18; V1 = 5 V; Tj = -40 °C to 150 °C.

ten DO tri L

DO enable time from

3-state to low level

CL = 50 pF; ILOAD = -1 mA;

pull-up load to V1

100

tdis DO L tri

DO disable time from

low level to 3-state

CL = 50 pF; ILOAD = -1 mA;

pull-up load to V1

100

ten DO tri H

DO enable time from

3-state to high level

CL = 50 pF; ILOAD = -1 mA;

pull-down load to GND

100

tdis DO H tri

DO disable time from

high level to 3-state

CL = 50 pF; ILOAD = -1 mA;

pull-down load to GND

100

td DO

DO delay time

VDO < 0.3 V1;

VDO > 0.7 V1; CL = 50 pF

Table 51. DO timing (continued)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Table 52. CSN timing

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

tCSN_HI,min

Minimum CSN

High time, active

mode

Transfer of SPI-command to

Input Register

μs

tCSNfail

CSN low timeout

Table 53. Inputs: TxD_C and TxD_L for Flash mode

Symbol

Parameter

Test condition

Min.

Typ.

Max. Unit

VflashL

Input low level (VTXDC/L for

exit from Flash mode)

6.1

7.25

8.4

VflashH

Input high level (VTXDC/L for

transition into Flash mode)

7.4

8.4

9.4

VflashHYS

Input voltage hysteresis

0.6

0.8

1.0

L99DZ100GP Datasheet(PDF) 63 Page - STMicroelectronics

L99DZ100GP Datasheet(HTML) 63 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL