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BLE121LR Datasheet(PDF) 5 Page - Silicon Laboratories |
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BLE121LR Datasheet(HTML) 5 Page - Silicon Laboratories |
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5 / 35 page ![]() Silicon Labs Page 5 of 35 1 Design Check List Min 17mm Min 17mm Metal clearance area Board edge • Make sure that the programing interface (P2_, P2_2, reset) is available for debugging or FW updates • Add test points for testing the current consumption • Make sure that all the IO’s are in a known state • Make sure that the layout under the antenna is done as instructed Place large capacitor in parallel with the battery to reduce the peak current drawn from the battery The external DCDC converter will reduce the maximum TX power by ~2 dB The DCDC pin (P1_7) can only be used for controlling the external DCDC. The operation of P1_7 must not be altered by SW. |
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