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BLE121LR Datasheet(PDF) 22 Page - Silicon Laboratories |
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BLE121LR Datasheet(HTML) 22 Page - Silicon Laboratories |
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22 / 35 page ![]() Silicon Labs Page 22 of 35 7 Design Guidelines 7.1 General Design Guidelines BLE121LR can be used directly with a coin cell battery. Due to relatively high internal resistance of a coin cell battery it is recommended to place a 100uF capacitor in parallel with the battery. The internal resistance of a coin cell battery is initially in the range of 10 ohms but the resistance increases rapidly as the capacity is used. Basically the higher the value of the capacitor the higher is the effective capacity of the battery and thus the longer the life time for the application. The minimum value for the capacitor depends on the end application and the maximum transmit power used. The leakage current of a 100uF capacitor is in the range of 0.5 uA to 3 uA and generally ceramic capacitors have lower leakage current than tantalum or aluminum electrolytic capacitors. Optionally TI’s TPS62730 can be used to reduce the current consumption during TX/RX and data processing stages. TPS62730 is an ultra-low power DC/DC converter with by-pass mode and will reduce the current consumption during transmission nominally by ~20% when using 3V coin cell battery. Because, unlike with BLE112 and BLE113, the TX power of BLE121LR is dependent on the power supply, the DCDC reduces the TX power by ~2dB, which provides additional saving in the peak current. So in total the peak current can be reduced by approximately 30% with the cost of 2 dB lower TX power. Figure 20: Example schematic for BLE121LR with a coin cell battery, TPS62730 DCDC converter and an I2C accelerometer 7.2 Layout Guide Lines Use good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog signal traces. If using overlapping ground planes use stitching vias separated by max 3 mm to avoid emission |
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