ASI4U datasheet(49/71 Pages) RENESAS

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ASI4U / ASI4U-E / ASI4U-F Datasheet

January 26, 2016

Table 4.21 Polarity of Manchester-II Signal at LED1

INPUT VALUES AT

DI2 AND DI3

DESCRIPTION

Equal (“11”, “00”)

Manchester-II signal is active HIGH (default logic output value at no communication is ‘0’).

This mode is compatible with the A²SI LED output

Unequal (“01”, “10”)

Manchester-II signal is active LOW (default logic output value at no communication is ‘1’).

Note: The complemented definition is designed to retain backward compatibility to A²SI-based AS-i Master

designs.

Every received AS-i telegram is checked for consistency with the protocol specifications and timing jitters are

removed if they remain within the specified limits. If a telegram error is detected, the output signal becomes

disrupted in such a way that subsequent logic can also recognize the Manchester-II-coded output signal as being

erroneous.

LED2 is always logic HIGH (high impedance) in the Master, Repeater, and Monitor Modes to reduce internal

power dissipation of the IC. In such applications, the green LED must be connected to the UOUT pin or different

supply levels.

4.10. Oscillator Pins OSC1, OSC2

Table 4.22 Oscillator Pin Parameters

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNIT

Input voltage range

VOSC_IN

-0.3

VU5R

External parasitic capacitor at oscillator

pins OSC1, OSC2

COSC

Dedicated load capacity

CLOAD

Input ”low” voltage for external clock

applied to OSC1

VIL

1.5

Input ”high” voltage for external clock

applied to OSC1

VIH

3.5

VU5R

4.11. IC Reset

Any IC reset turns the Data Output and Parameter Output registers to FHEX and forces the corresponding output

drivers to high impedance state. Except at power-on reset, Data Strobe and Parameter Strobe signals are

simultaneously generated to visualize possibly changed output data to external circuitry.

The Data_Exchange_Disable flag becomes set during IC reset, prohibiting any data port activity right after IC

initialization and as long as the external circuitry was not pre-conditioned by decent parameter output data.

Consequently the AS-i master has to send a Write_Parameter call in advance of the first Data_Exchange request

to an initialized slave. Following IC initialization times apply:

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