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ASI4U / ASI4U-E / ASI4U-F Datasheet

January 26, 2016

3.5.

EEPROM

The ASI4U provides an on-chip EEPROM with typical write times of 12.5ms and read times of 110ns. For security

reasons, the memory area is structured in two independent data blocks and a single bit Security flag.

The data blocks are named the “User Area” and “Firmware Area.” The Firmware Area block contains all

manufacturing-related configuration data (e.g., selection of operational modes, ID codes). It can be protected

against undesired data modification by setting the Program_Mode_Disable flag to 1.

The User Area contains only data that is relevant for changes in the final application (i.e., field installation of the

slave module). The environment, where modifications of the user data might become necessary, can sometimes

be rough and unpredictable. In order to ensure a write access cannot result in an undetected corruption of

EEPROM data, additional security is provided when programming the User Area.

Any write access to the User Area (by the calls Address_Assignment or Write_ID_Code1) is accompanied by two

write steps to the Security flag, one before and one after the actual modification of user data.

The following procedure is executed when writing to the User Area of the EEPROM:

The Security flag is programmed to 1.

The content of the Security flag is read back, verifying it was programmed to 1.

The user data is modified.

A read back of the written data is performed.

If the read back has proven successful programming of the user data, the Security flag is

programmed back to 0.

The content of the Security flag is read back, verifying it was programmed to 0.

In addition to a read out of the data areas, the Security flag of the EEPROM is also read and evaluated during IC

initialization. If the value of the Security flag equals 1 (e.g., due to an undesired interruption of a User Area write

access), the entire User Area data is treated as corrupted and the Slave Address is set to 0HEX in the

corresponding volatile shadow registers during initialization. Then the programming of the User Area data can be

repeated.

Table 3.4

EEPROM Contents

User Area

Firmware Area

ASI4U Internal EEPROM

Address [hex]

Bit

Position

EEPROM Cell Content

EEPROM Register Content

0 to 3

A0 to A3

Slave address low nibble

Slave address high nibble

0 to 2

ID1_Bit0 to ID1_Bit2

ID_Code_Extension_1

ID1_Bit3

ID_Code_Extension_1, A/B slave selection in

extended address mode

3 to 7

Not implemented

0 to 3

ID_Bit0 to ID_Bit3

ID_Code

0 to 3

ID2_Bit0 to ID2_Bit3

ID_Code_Extension_2

0 to 3

IO_Bit0 to IO_Bit3

IO_Code

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